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TMS570LC4357: EMAC generates RXERRORCODE and TXERRORCODE when the MII is enabled

Part Number: TMS570LC4357


I have a TMS570LC43x processor and I am attempting to get the ethernet working for our application.

I have browsed some other threads but the solutions offered there did not seem to help.

Currently I have done the following:

  •  Ran the LWIP example code successfully with no issues. This was to ensure that not only the software was working correctly, but the hardware was wired correctly as well.
  • Directly added the LWIP 1.4.1 example project to my code
    • The exception being the pinmux was specific for my board, but I ensured that the related MII pins were not changed.
  • When the code reaches the portion that enables the MII controller it immediately throws the RXERRORCODE in MACSTATUS: Ownership bit not set in SOP buffer
  • Later in the initialization when it attempts to send an ARP request it also throws a TXERRORCODE: Zero Length buffer

I have tried

  • Disabling cache
  • Checking the clock source
  • isolating the code within the RTOS that I use

The only minor modifications that I have made to the LWIP is to remove interrupts based on RX / TX for the EMAC. I tested this in the example program and it still worked so these errors have left me baffled.

Any insight into what causes these errors to be thrown would be helpful.