This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LC4357: STC

Part Number: TMS570LC4357

王工您好:

        关于STC功能,我想咨询一下。如果intervalCount = 10,那么是每次之执行interval 10还是从1执行到10?restartInterval0 起到什么作用啊?

stcSelfTestConfig.stcClockDiv = 0; /* STC Clock divider = 1 */
stcSelfTestConfig.intervalCount = 10; 
stcSelfTestConfig.restartInterval0 = TRUE; /* Start from interval 0 */
stcSelfTestConfig.timeoutCounter = 0xFFFFFFFF; /* Timeout counter*/
SL_SelfTest_STC(STC1_RUN, TRUE, &stcSelfTestConfig);

  • At a time, you can run the complete test (125 for segment 0), or run a single interval (for example interval 0), or multiple intervals.

    For multiple intervals test, you can start the test from the last executed interval (for example interval 11) or restart the test from the beginning (interval 0).

    RS_CNT=1 in your configuration, the the test will restart from interval 0.

  • 王工:

            1)按照我上面写的代码,是不是每次都是执行interval 0到10。

            2)如果我想每次只执行interval10、11这两个,代码该怎么写啊。

            3)是不是只要执行了STC测试,芯片就会重启。

            4)STC1 Segment 0 中每个interval具体测试了哪些内容,我们从哪看啊。

            5)stc测试enable后(STCGCR1[3:0]= 0xA),芯片是不是就只进行stc测试,其他代码就不运行了。

            6) GCLK1=330MHZ,stcSelfTestConfig.stcClockDiv = 0;上图中比如intervals 0,测试时间就是多久啊,谢谢。

  • Each interval is a separate test that is testing different areas of the core. With this said, it is important to know that the tests are designed to test the core at gate levels using the microcode stored in the STC ROM. Each separate interval executed will gain coverage of a percentage of the overall gates. For example if you execute interval 1 repeatedly, you will only get 56.85% coverage and never more. If you add the second interval, you will get approximately an additional 8% coverage, a third will give + approx. 4.5%, and you will only achieve the full 95.51% coverage when all 125 intervals have been executed.


    With this in mind, one approach to performing the CPU BIST is to execute a few intervals periodically in your application. For example, if you have a 500us main loop, you would execute 21 intervals continuing from the last executed interval in the next loop until all 125 are executed. This means it would take 6 iterations of your main loop before you have the full capability of the coverage but you would have this during the active execution of the application. It is key to understand that during the CPU BIST, the CPU is completely unavailable to the application so you must plan the number of intervals in accordance with your applications ability to handle this period of unresponsiveness.

    Finally, the STCGC0 register has the field that determines how many intervals are executed for each loop/instantiation as you mentioned in your post. As long as you set the RS_CNT field to continue STC run from previous interval, you will always get a continuation. You can check this by looking at the interval count given in STCCICR which you will see increment for each interval execution and which will allow you to monitor the level of coverage you have achieved so far.

  • 1)按照我上面写的代码,是不是每次都是执行interval 0到10。

    yes, it restarts from interval 0 everytime.

    2)如果我想每次只执行interval10、11这两个,代码该怎么写啊。

    No, It must run either from interval 0 or from the current interval in the current interval counter which specifies the last executed interval number.

            3)是不是只要执行了STC测试,芯片就会重启。

    Yes, STC generates a CPU reset after completion of the test regardless of pass or fail.

    4)STC1 Segment 0 中每个interval具体测试了哪些内容,我们从哪看啊。

    It tests CPU core logic at transistor level. Each interval covers a dedicated area of the CPU core, and number of logic gates might be same for each interval. 

      5)stc测试enable后(STCGCR1[3:0]= 0xA),芯片是不是就只进行stc测试,其他代码就不运行了。

    yes, during the CPU BIST, the CPU is completely unavailable to the application.

      6) GCLK1=330MHZ,stcSelfTestConfig.stcClockDiv = 0;上图中比如intervals 0,测试时间就是多久啊

    The maximum CPU BIST clock is 110MHz, so STCCLKDIV=0 is not a valid value.

    Please see the test cycles listed in Table 10-2.