AM2432: PADCONFIG Question

Mari Tsunoda

Part Number: AM2432

Hi Team,

My customer has questions as below.

1. What value should I set to DRV_STR bit of PADCONFIG registers?
The description in PADMMR_PADCONFIG* Register Field Descriptions says "Drive Strength Control . Selects the drive strength value for LVCMOS
pins. (Does not apply to other pin types)"
Are there any specific current value?

2. What value should I set to DEBOUNCE_SEL bit of PADCONFIG registers?
The description in PADMMR_PADCONFIG* Register Field Descriptions says "Selects the debouce period for the pad."
Are there any specific time value?

Best regards,

Mari Tsunoda

over 3 years ago

0 Fleenor over 3 years ago

TI__Mastermind 25093 points

Hello Mari,

Question has been assigned and we are looking into it, should have an answer before EOW. Thank you for your patience.

Best Regards,

Zackary Fleenor

0 Mari Tsunoda over 3 years ago in reply to Fleenor

TI__Expert 5726 points

Hi Zack,

Any update on this?

Best regards,

Mari Tsunoda

0 Fleenor over 3 years ago

TI__Mastermind 25093 points

[deleted]

+1 Fleenor over 3 years ago in reply to Fleenor

TI__Mastermind 25093 points

Hey Mari,

1) The default reset value for these registers is described in the Control chapter of the device TRM (see screenshot below). In the case of DRV_STR, the default reset value is 0x00.

2) The default reset value should be used for the DEBOUNCE_SEL bit of PADCONFIG registers. Additional details related to specific time values will require some internal review and discussion. Please open a new thread dedicated to this topic.

Best Regards,

Zackary Fleenor

0 Mari Tsunoda over 3 years ago in reply to Fleenor

TI__Expert 5726 points

Thanks Zack! Marked as resolved.

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AM2432: PADCONFIG Question