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TMS570LC4357: FreeRTOS

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN,

Hello Team,

I am trying to enable FreeRTOS in our Software. For the Start, I have tried to run the " example_freeRTOSBlinky.c".

The SW works fine until I do a Reset on the CCS. The SW gets stuck in undefEntry. I could see that the address which causes this Issue is "0x0000B97C".

Can the team give me an Insight on why is this happening and how can this be resolved.

Thanks and Regards,

Sakti Kumar Padhy

  • Hi Sakti,

    From your snapshot, the value of the mode bits (M[4:0]) are b1000, which means the processor is operation in USER mode.

    The address generated UNDEF abort is at R14_UND - 0x4 = 0xB978  --> MRC ...

    You can access the CP15 registers only with MCR and MRC instructions and only in a privileged mode. The UNDEF abort will be generated if calling those ARM instructions in USER mode.

  • Hello,

    1) The Mode in the Undefined_Registers points that CPU is in USER Mode, but the Mode in Core_Registers says that it is 0x1B which means Undefined Mode. Which needs to be considered in this case??

    2) Why is CPU not switching to System Mode according to the code??

    Kind Regards,

    Sakti

  • Another Question: - Privileged Mode is all the modes except USER Mode right??

  • Another Question: - Privileged Mode is all the modes except USER Mode right??

    Yes, you are absolutely correct.

  • Hello Wang,

    Can you also please let me know the answers for the questions mentioned above as well.

    Thanks

  • 2) Why is CPU not switching to System Mode according to the code??

    I don't know why the mode is not switched to system mode. Please add a breakpoint, then step through the instructions which configures the mode to check if the mode is switched or not. I remember I answered this question in another thread.

    Which needs to be considered in this case??

    This is the mode after the abort has happened. 

  • Hello,

    said: 

    Please add a breakpoint, then step through the instructions which configures the mode to check if the mode is switched or not. I remember I answered this question in another thread.

    Ans) I did that and I can see that CPU is not switching from USER Mode (SW is running) to any of the other modes in _coreInitRegisters_ function.

    Therefore, SW is going into UNDEF Abort at Line 102 as SW is trying to access CP15 registers in USER Mode.

    Can you also point me to the Previous Post where you discussed this problem as I cannot the Post on the forum.

    Thanks

  • The FIQ and IRQ are disabled by default, why the F and I bits are cleared in your snapshot.

    The default mode should be supervisor mode (M[4:1]=b10011), why is it user mode (b10000) in your snapshot?

    Did you call other function before calling _coreInitRegisters_()? 

    Can you reset the device (using CCS-->Run-->Reset-->System reset), then check if CPSR restores its default value? Its default value is 0x000003D3.

  • 1) The FIQ and IRQ are disabled by default, why the F and I bits are cleared in your snapshot.

    The default mode should be supervisor mode (M[4:1]=b10011), why is it user mode (b10000) in your snapshot?

    Ans) I am not sure why.

    2) Did you call other function before calling _coreInitRegisters_()?

    Ans) No I have not added anything before the _coreinitRegisters().

    3) Can you reset the device (using CCS-->Run-->Reset-->System reset), then check if CPSR restores its default value? Its default value is 0x000003D3.

    Ans) I did this and observed that the correct sequence of Mode change happens in case of (using CCS-->Run-->Reset-->System reset) and (using CCS-->Run-->Reset-->CPU reset) but in the case of the Restart button.

    My Observation: -

    1. using CCS-->Run-->Reset-->System reset = Tasks are running fine by triggering the Preemptive ISR. Mode is System Mode while at FPU enable Instructions in _coreinitRegisters_().

    2. using CCS-->Run-->Reset-->CPU reset = Tasks are running fine by triggering the Preemptive ISR. Mode is System Mode while at FPU enable Instructions in _coreinitRegisters_().

    3. Restart = undef Abort at FPU Enable instructions in _coreinitRegisters_() because of accessing CP15 registers in User Mode.

    Thank You.

  • Hi Sakti,

    I just generated a freeRTOS example project using HALCoGen, and tested on LC43x launchpad. I didn't see any issue. 

    Have you enabled the FPU and selected a correct FPU algorithm?

  • Hello,

    Yes, It is enabled and I have got the exact same Processor options in my Properties.

  • Hi Sakti,

    This is a issue. 

    When you power up the device, the CPU should be in privileged mode. You can decide to stay in this mode and execute all your code in this mode. If you want to enter user mode, you will program CPSR to switch to user mode easily.

    To switch from user to a privileged mode, you can use an SVC call or use a System Software Interrupt of the system module (SSI) which will generate an IRQ interrupt for you and put you into the IRQ mode. I am not sure how to do this during power-up.

    Are you using TI EVM? If not, can you try another board or another silicon you ordered from ti?

  • Hello,

    I have tried it on TMS50LC4357 HDK TI EVM and also on custom Board. I am getting the same Problem in both cases.

    I guess I can still continue with the development of FreeRTOS as this problem is seen in case of Restart on CCS and not in case of System Reset or CPU Reset. Please let me know your suggestion. Thanks.

  • Hello,

    1) Are you not facing this same Issue on TI EVM? 

    2) Is this a Problem in Firmware? As the problem can be seen on the first line of Startup?? (Problem:-  CPU is not back to Privileged Mode on Restart from CCS)

    Thanks

  • Hi Sakti,

    Yes, I use TI TMS570LC4357 HDK.

    After I erased the whole flash, I got CPSR=0x000003DB (Undef instruction mode). It is expected because there is no instruction at 0x00000000. Undef mode is also a privileged mode.

    After I programmed a image to flash (rtiBlinky), the CPSR=0x000003D3 (Supervisor mode) after system reset (no code executed).

  • Hello,

    Thank You for checking this from your side.

    I can also see that CPSR is 0x000003D3 in case of a System Reset and CPU Reset.

    This is not the case when I do a Restart. The Mode is still User Mode in this case.

    You mentioned that you see that CPSR as 0x000003D3 in case of a System Reset.

    Can you please check the CPSR in case you do a Restart?

    Thanks