Part Number: AM2432
Hi Team,
My customer has a question as below.
I found the TI's engineer's comment as below
"All enabled input buffers must be pulled below its VILSS potential or pulled above its VIHSS potential as defined in the respective Electrical Characteristics section of the datasheet. "
URL:
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1086028/faq-am2432-am2x---boot-pins-pull-down-up-requirements?tisearch=e2e-sitesearch&keymatch=QSPI%2520boot%25201S-1S-4S#
If I set RXACTIVE bit to 0 in the PADCONFIG register(Input buffer disabled), is pullup or pulldown register not needed?
Which selection is preferred to non-used pin? (No connection to the all on PWB)
1, disable input buffer(RXACTIVE=0)
2, enable output buffer(TXDIS=0) and select GPIO and output Hi or Low.
3, setup pulldown or pullup with PADCONFIG register.
Best regards,
Mari Tsunoda