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AM2434 internal bus information

太 岡崎
Prodigy 210 points

Dear Sir

I'm looking at the TRM of AM243x.

Could not find information on the internal bus used to access peripheral registers from the CPU.

Please let me know if there is a document with the following information about the internal bus.

- Types of internal buses

- A table or block diagram that shows which internal bus is connected to which register

Best regards

  • 0
    TI__Guru 55045 points

    Dear Sir,

    The peripherals are connected to the CPUs (R5F cores or M4F core) via INFRA_CBASS0 . Please see the "3.1 System Interconnect Overview" of the TRM for details. All the peripherals' registers are Memory Mapped (MMR). See "2 Memory Map" for details.

    Best regards,

    Ming 

  • 0 in reply to Ming Wei
    Prodigy 210 points

    Ming-san

    thank you for your answer.
    Are all peripheral modules connected to INFRA_CBASS0?
    Also, isn't INFRA_CBASS0 itself made up of even more detailed buses?

    Best regards

  • 0 in reply to 太 岡崎
    TI__Guru 55045 points

    Dear Sir,

    According to the TRM, "Most of the device modules are connected to the CBASS0 interconnect that is located in VD_CORE." (Slaves and Masters) and "INFRA_CBASS0 contains ... also peripherals not power managed in the MAIN domain." The CBASS0, INFRA_CBASS0 and MCU_CBASS0 are all Cross Bar System. They provide the direct connections between the Cores (sources) and Peripherals (destinations).

    Best regards,

    Ming