TM4C129ENCPDT: Resetting tampers in HIB module

Hi

I'm clearly missing something, Ive seen a couple of posts on the same subject and read the datasheet but I can't seem to clear HIBTPSTAT and hoped the eagle eyed amonst you would spot my mistake.

I want to use TMPR0 to indicate if my device has been interferred with, the MCU wont be asleep so no need to wake it up I just want to make sure the necessary housekeeping associated with the event is taken care of, but HIB_TPSTAT is remaining set despite me appearing to set the TPCLR in HIBTPCTL.

bool
HibernateInitialisation(const uint32_t sys_clock_frequency)
{
    uint32_t status;

    bool was_on = false;

    //
    // Enable the hibernate module.
    //
    MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_HIBERNATE);

    if (MAP_HibernateIsActive())
    {
        was_on = true;
        //
        // Hibernation module is already active, this could mean that the processor is waking
        // from a hibernation. Read the status bits to see what caused the wake.  Clear the wake
        // source so that the device can be put into hibernation again.
        //
        status = MAP_HibernateIntStatus(false);
        MAP_HibernateIntClear(status);
    }

    //
    // Configure Hibernate module clock.
    //
    MAP_HibernateEnableExpClk(sys_clock_frequency);

    //
    // Configure the module clock source.
    //
    MAP_HibernateClockConfig(HIBERNATE_OSC_LOWDRIVE);

    //
    // Enable RTC mode.
    //
    MAP_HibernateRTCEnable();

    //
    // Configure the hibernate module counter to 24-hour calendar mode.
    //
    MAP_HibernateCounterMode(HIBERNATE_COUNTER_24HR);
    
    // 
    // Doesn't erase BBRAM nor wake up the MCU from hibernation.
    //
    MAP_HibernateTamperEventsConfig(HIBERNATE_TAMPER_EVENTS_NO_ERASE_HIB_MEM | HIBERNATE_TAMPER_EVENTS_NO_HIB_WAKE);

    //
    // Setup the Tamper IO, this will override any existing IO configuration. 0 == TMPR0 (PM7)
    // Internal weak pull up used, active low
    //
    MAP_HibernateTamperIOEnable(0, HIBERNATE_TAMPER_IO_WPU_ENABLED | HIBERNATE_TAMPER_IO_TRIGGER_LOW);
    
    //
    // Enables the tamper feature.
    //
    MAP_HibernateTamperEnable();
    
    return was_on;
}

void
NmiISR(void)
{
    uint32_t nmi_source = SysCtlNMIStatus();
    switch (nmi_source)
    {
#if HIBERNATION        
        case SYSCTL_NMI_TAMPER:
            DEBUG_MSG("TAMPER NMI\r"); 
            DEBUG_MSG("HIB Tamper Status = 0x%x\r", (HWREG(HIB_TPSTAT) & HIB_TPSTAT_STATE_M) >> 2);
        
            //
            // Clear the source of the NMI. Reset the STATE field of the HIB Tamper Status 
            // register by he STATE field by writing to the TPCLR bit in the HIBTPCTL register.
            //
            HWREG(HIB_TPCTL) |= HIB_TPCTL_TPCLR;
            DEBUG_MSG("HIB Tamper Ctrl = 0x%x\r", (HWREG(HIB_TPCTL) & HIB_TPCTL_TPCLR) >> 4);
            DEBUG_MSG("HIB Tamper Status = 0x%x\r", (HWREG(HIB_TPSTAT) & HIB_TPSTAT_STATE_M) >> 2);
            
            // 
            // Clear the NMIC register bit that corresponds with the NMI source.
            //
            SysCtlNMIClear(nmi_source);
        break;
#endif  /** HIBERNATION */              

        default:
            //
            // Enter an infinite loop.
            //
            for(;;);        
        break;
    }
}

The output I see in my terminal is:

TAMPER NMI<CR>
HIB Tamper Status = 0x2<CR>
HIB Tamper Ctrl = 0x0<CR>
HIB Tamper Status = 0x2<CR>

Which I can confirm if I examine the registers within my IDE. Any thoughts?

Thanks HL.