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TMS570LC4357: TMS570LC4357

Part Number: TMS570LC4357


Hey,

I am currently trying to debug the ESM interrupt behavior of the TMS570LC4357 using a Lauterbach setup (Powertrace 3 + Power Debug Pro + Preprocessor Autofocus 2). In more detail I am writing a non zero value to the Polarityinvert Register of the R5-CCM module to force a core compare mismatch which would lead to the ESM Group 2 being triggered on channel 2. The behavior works perfectly fine and as expected when debugging with CCS, however once I connect the Lauterbach to use Trace32 the esmGroup2 handler is not being called anymore and the error LED is not being toggled. The coded does reach the point of setting the Polarityinvert Register though. Even when flashing the board trough the Powertrace the LED starts blinking again when I disconnect the Powertrace and powercycle the board so I assume the software is flashed correctly.

Is the Lautebach effecting the ESM or CCM module? Am I missing something? I've tried to find more info on it but could not find anything indicating that using Trace32 would have any effect on this error detection mechanism.

Thanks in advance,

Alex

  • Hi Alex,

    The JTAG debugger should be disconnected before performing CCM self test.

    13.2.5 Operation During CPU Debug Mode (from TRM, page 507)
    Certain debug operations place the CPU in a halting debug state where the code execution is halted.
    Because halting debug events are asynchronous, there is a possibility for the debug requests to cause
    loss of lockstep. CCM-R5F will disable all functional diagnostics upon detection of halting debug requests.
    Core compare error will not be generated and flags will not update. A CPU reset is needed to ensure the
    CPUs are again in lockstep and will also re-enable the CCM-R5F.

  • Oh I have missed that part.. This helps a lot. I would assume this means, the lockstep mechanism cannot be debugged when using the Lauterbach?
    And one more thing. On CCS I have been monitoring frequent esmGroup2 Errors on Channel 3 (Fatal Bus Error) which is why I wanted to check if they occur on the Lauterbach as well. Could they be due to the Lockstep Interrupt handler being called? Would the channel 3 error still work with the CPU in debug mode?

    Cheers, Aelx

  • Hi Aelx,

    The lockstep mechanism can be checked by CCM-R5F module. The outputs of the two CPU cores are compared on each CPU clock cycle. Any miscompare is flagged as an error of the highest severity level. You can configure the CCM to diagnostic mode (selftest or fault-injection) to check if the CCM works correctly.

    The ESM 2.3 is commonly caused by improper ECC in flash memory. The ECC values for all of the Flash memory space (Flash banks 0 through 6) must be programmed into the Flash before the program/data can be read.

    When CPU Bus compare failure occurs, the ESM 2.2 will be set. 

    Whenever the ESM flag is set, you need to figure out the causes of the failure and correct them.