AM2634-Q1: UART LSR register exception: RX_FIFO_STS field equals 1 while RX_FIFO_E field equals 0

Hello Will,

The RX_FIFO_E bit being clear means that there are zero data characters in the RX FIFO. Since the RX_FIFO_STS bit is set, there is at least one parity error caused by framing error or break indication in the RX FIFO. To clarify, is your question why there is an error despite zero data characters in the RX FIFO?

Regards,

Erik

Hi Erik, 

Yes, my question is why there is an error despite zero data characters in the RX FIFO and how to clear the RX_FIFO_STS flag in this case. 

Furthermore, in customer field, I found that this error would happen if there is low level duration 25 ms in the RX line of UART. Please give some comments on this phenomenon.

Regards, 

Will 

Hello Will,

I have a few follow up questions.

1. Is the FIFO_EN bit (bit 0) set in the UART0_FCR Register (Physical address: 0x52300008)? 

2. Are you able to capture an oscilloscope shot of the UART RX line to confirm that there are zero data characters?

3. What source is being used for the UART Transmit?

Thank you,

Erik

Hi Erik, 

1. Yes, the FIFO_EN bit is 1. 

2 and 3: the AM263x is communicating with F280041 via UART. The transaction between them is random, and the bug will happen if the F280041 is in reset mode when RX line will be pulled-down for 25ms. And another point is if there are transactions before the reset of F280041 a couple of microseconds, the reset will have no influence and UART module in AM263x can work as usual. 

Regards, 

Will 

Hello Will,

I am looping in more experts on this issue and will have a response for you in the next two days.

Best Regards,

Erik

Hi Erik, 

Any good news? 

Regards, 

Will 

Hello Will,

I apologize for the delay, I am still trying to find a solution for your issue. I expect to have a response by the end of tomorrow.

Regards,

Erik

Hi Will,

FE, PE and BI errors can be checked from the RHR register and OE from the LSR register. Can you confirm which error is occurring ?

Regards,

Ashwin

Hi Ashwin, 

The FE, PE, OE and BI bit-fields are all 0. And the RX_FIFO_E is also 0. 

Regards, 

Will 

Hi BU friends, 

Any good news for explaining this issue? The customer uses UART to update the firmware of another MCU and the above condition is usually happened, they don't want to warm-reset the UART every time this condition happened since they should configure the UART module again which consumes much time. Their appeal actually is how to more quickly clear the RX_FIFO_STS flag. 

Regards, 

Will 

Hi Will,

The issue doesn't seem to occur on the examples already there in SDK. I had a look at the memory map and RX_FIFO_STS bit is not getting set.

Is there a way to recreate this issue, so that we can do a root cause analysis ?

Regards,

Ashwin