I am using a vendor-provided DHCP library to implement DHCP on the W5500 chip, but I am afraid the library might be incorrectly synchronized. The library uses a volatile counter to detect timeouts, and assumes two thread: one that resets the counter and checks if it has expired, and another that increments it. Here is the declaration:
volatile uint32_t dhcp_tick_1s = 0; // unit 1 second
And here is the counter being used:
/* Reset the DHCP timeout count and retry count. */
void reset_DHCP_timeout(void)
{
dhcp_tick_1s = 0;
dhcp_tick_next = DHCP_WAIT_TIME;
dhcp_retry_count = 0;
}
void DHCP_time_handler(void)
{
dhcp_tick_1s++;
}
To me, it seems that this code only works as long as the dhcp_tick_1s acesses are atomic, but I could not find any documentation. In fact, the ARM Optimizing C/C++ Compiler v18.1.0.LTS User's Guide implies the opposite:
• Atomic operations (introduced in the C++11 standard) are not supported
• Data-dependency ordering for atomics and memory model (introduced in the C++11 standard) is not supported
So, is the code above ok? If not, how can I implement a shared 32-bit counter with atomic increments and resets?
