Other Parts Discussed in Thread: SYSCONFIG,
We are using SPI1 interface with CS0, CS1, CS2, CS3 each connected to a different SPI NOR Flash part .
Apparently the Sysconfig only allow us to configure the SPI port with multiple Chip Selects only in Multi-master mode.
When we configure to multi-master and when we do a transfer the SPI interface on the TI part will only allow a transfer of one frame (byte) and then the CS line deactivates. This is a problem when communicating to NOR Flash parts since after writing the command byte you then send a piece of data or wait for the read reply of the flash part. But because the chip select deactivates after the first byte the NOR flash cant understand and it assumes it was an abort after the command.
If the Sysconfig was configured in single master mode with one Chip select line, then the chip select works correctly by allowing the CS to stay active . So lets say we wanted to transfer 8 bytes what normally happens is the buffer is loaded the the cycle begins after we say start. The Chip select goes low and then all 8 bytes are sent and then the chip select goes high. This is not what happens when in multi-master mode and we cant configure Sysconfig as single master with four chip selects.
We are prevented from configuring the AM2431 as single master with four chip selects, and it only allows us to configure it as Multi-master mode. In multi-master mode the Chip select becomes deactivated after each byte that is sent and then reactivates for the next byte.
