AM2432: Pin Assignment

Hi Team,

My customer has a few questions regarding the errata i2287. 

AM243x Errata Link: https://www.ti.com/lit/pdf/sprz457

The custom board which implemented Rev.1 XAM2434 they are evaluating is as below:

• J15, K14(both VDDS_MMC0) are connected to 1.8V power
• J13(VDDA_ADC is connected to GND (ADC is not used on our application)
• K16(VMON_1P8_MCU),E12(VMON_1P8_SOC are connected to 1.8V power 1.8V(VMON_1P8 is not used on our application)

They have the questions below:

1. Errata i2287 describes the following: If ADC0 is not being used, where VDDA_ADC0 is connected to VSS as described in the Connections for Unused Pins section of the datasheet, a SR2.0 device cannot be installed. This is not allowed because the potential applied to ADC0_REFP can never exceed the potential applied to VDDA_ADC0,... If they implement Rev.2 AM243x into their current custom board, what will happen? (J13(VDDA_ADC) is connected to GND, J15(ADC0_REFP) is connected to 1.8V power) For example, they've listed below some possible cases: 
   1. ADC block will be damaged.
   2. Blocks other than ADC will be damaged or operate abnormally.
   3. Protection diode between VDDA_ADC and ADC0_REFP will conducts in the forward direction. So 1.8V power and GND will be shorten in the CPU package.
   4. Other defects will occur (If other defects will occur, please elaborate)
2. According to the datasheet, says the following: If these pins are connected to GND or remain floating, what will happen? The datasheet doesn't say about the effect. For example will the following occur?
   1. MMC0 or VMON will operate abnormally.(but we don't use them..)
   2. Functions other than MMC0 and VMON will operate abnormally.
   3. Due to MMC0 or VMON block damage or malfunction, Defects on EMC, timing, logic level and so on will occur.
   4. Other defects will occur