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AM2634: PRU Interrupt Map

Lukas Hauser
Prodigy 40 points

Part Number: AM2634

Hi 

I'm trying to speed up interrupts in the PRU by using the R31. In the TRM of the AM2634 (spruj17.pdf) chapter 10.4.5 is an interrupt map with an interrupt ID column. Does this number reflect the system event  ID? How would I connect an ADC end of conversion interrupt to go there?

Thanks in Advance

Lukas

  • 0
    TI__Mastermind 30108 points

    Hi Lukas,

    I'm looking into this and will get back with you shortly.

    Regards,
    Frank

  • 0
    TI__Mastermind 30108 points

    Hi Lukas,

    Sorry for the delayed response. I'll respond early next week.

    Regards,
    Frank

  • 0
    TI__Mastermind 30108 points

    Hi Lukas,

    Lukas Hauser said:
    How would I connect an ADC end of conversion interrupt to go there?

    ADC EOC interrupts can be routed to the ICSS-M INTC via the Control SS OUTPUT XBAR.

    Please see the AM263x TRM (https://www.ti.com/lit/ug/spruj17a/spruj17a.pdf):

    • Section 7.4.2.8 EOC and Interrupt Operation: each ADC has four configurable ADC interrupts
    • Section 7.4.10.5 OUTPUTXBAR: ADC EVT 1/2/3/4 can be routed outside the Control SS

    ADC EOC interrupts can be routed through the Output XBAR to ICSS-M interrupt inputs.

    The following diagram shows the connections between the Control SS Output XBAR [15:0] (16 outputs) and ICSS-M interrupt inputs.

    As can seen in the diagram, there are two modes which map external (from ICSS-M perspective) interrupts to ICSS-M INTC System Events:

    • For ICSS_MII_RT_REG:MII_RT_EVENT_EN=1: Control SS Output Xbar [15:0]   -> pr1_slv_intr<31:16>  -> System_event[63:48]
    • For ICSS_MII_RT_REG:MII_RT_EVENT_EN=0: Control SS Output Xbar [15:8]   -> pr1_slv_intr<31:24>  -> System_event[63:56]

    See the TRM Section 7.2.7 PRU-ICSS Local INTC for a description of the ICSS-M INTC.

    Regards,
    Frank

  • 0 in reply to Frank Livingston
    Prodigy 180 points

    Hi Frank,

    I have taken over the tasks of Lukas and I have to apologize because I forgot to take a look about the answers on this thread.

    I agree that the OTUPUTXBAR can route the events 1 to 4 from ADCs to ICSSM INTC. However, the events of the ADCs are, from my understanding, the outputs of the PPB modules and not the end of conversion interrupts. Is it correct?

     

     

    Secondly, on the same topic, how is it to understand the table 7-64 in TRM section 7.2.7? Events 0 to 15 are generated by the PRUs or ICSS peripherals, then the events 32 to 63 are quite difficult to understand because they have the prefix "pr0_" that does not match with the doc of the OUTPUT XBAR or the ICSS XBAR. So reading you answer, I understand the following:

    • For ICSS_MII_RT_REG:MII_RT_EVENT_EN=1:
      • Control SS Output Xbar [15:0]   -> pr1_slv_intr<31:16>  -> System_event[63:48]
      • PRU-ICSS XBAR INTR [15:0]   -> pr1_slv_int<15:0> -> System event[47:32]
    • For ICSS_MII_RT_REG:MII_RT_EVENT_EN=0:
      • Control SS Output Xbar [15:8]   -> pr1_slv_intr<31:24>  -> System_event[63:56]
      • PRU-ICSS XBAR INTR [15:8]   -> pr1_slv_int<23:0> -> not mapped as system event

    Is my understanding true?

    Thank you for you answer and your time.

    Br, Nicolas

  • 0 in reply to Nicolas B.
    TI__Mastermind 30108 points

    Hi Nicolas,

    I'm looking into these questions and will get back with you shortly.

    Regards,
    Frank

  • 0 in reply to Nicolas B.
    TI__Mastermind 30108 points

    Hi Nicolas,

    Sorry for the delayed response.

    Nicolas B. said:
    However, the events of the ADCs are, from my understanding, the outputs of the PPB modules and not the end of conversion interrupts. Is it correct?

    Yes, it appears I was mistaken about ADC EOC interrupt routing. Reviewing this more carefully, I now understand:

    • ADCn.EVTINT : OR'ed combination of 4x PPB ADCEVTINTx for each ADCn, n=1..5. Routed through INTXBAR → VIM.
    • ADCn.INT1-4 : 4x configurable interrupts for each ADCn, n=1..5. Routed through INTXBAR → VIM.
    • ADCn.EVT1-4 : 4x PPB events for each ADCn, n=1..5:
      • Routed through PWMXBAR → ICSSM GPI
      • Routed through OUTPUTXBAR → ICSSM INTC.
    Nicolas B. said:
    So reading you answer, I understand the following:

    Yes, this is correct.

    Regards,
    Frank

  • 0 in reply to Frank Livingston
    Prodigy 180 points

    Hi Frank,

    thank you, so for me is evething clear now.

    Have a nice day, Regards. Nicolas