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LP-AM243: Are there any analog comparators & IMC any like NVIC?

Guru 55913 points
Part Number: LP-AM243
Other Parts Discussed in Thread: AM2431,

Comparisom Table 5-1 shows ALV has x9 port/s EPWM is version 4? 

Note: "The device has six instances of EPWM modules." Device TRM link not found under Technical Documentation?

Also has 16 desirable timers plus ARM Cortex M4F with 4 CPU timers + separate GPIO domain.

1. Will the IMC (not shown Fig.3-1) work with existing Cortex M4F NVIC priority levels without reconfiguring M4 source?

Note: "Support for Nested Vectored Interrupt Controller (NVIC) with 64 inputs"

2. Can existing TM4C1294 Cortex M4 C code easily migrate to AM2431 peripherals given a TI cross compiler exists? 

3. Are there any analog comparator peripherals or can ECAP inputs trigger EPWM fault status registers?

4. The LP-AM243 has AM2431 (ALV) MCU and Not X or P (TMDX) device marking and currently TMDS?

Thanks for any informationSlight smile

  • Reading further into AM243x datasheet a web link exists for AM243x, TRM download is huge!

    Note: "The device has six instances of EPWM modules."

    Oddly The TRM show 9 instances with 2 ports each instance. Seemingly ALV has more GPIO ports than ALX 

    1. The R5F has GIC-500 interrupt controller but M4F core appears to have NVIC interrupt controller too. Neither interrupt controller is shown Fig 3-1. Device System Interconnect Overview.

    • Microprocessor unit (A53SS0)
    Dual-A53 cluster
    SoC-level generic interrupt controller (GICSS0) supports both cores in the dual-A53 cluster

    • Safety-channel (or general-purpose) microcontroller unit (MCU_M4FSS)
    Single Arm Cortex-M4F core
    Nested vectored interrupt controller (NVIC)

    2. No - especially Timers and PWM modules are completely different and more like C2000 series EPWM type 4.

    Good question, is Instaspin FAST estimator embedded?

    3. No - only EPWM trip zones exist for GPIO external port and somewhat limited fault scope for advanced PWM module.

  • Hello,

    Correct there are 9x EPWM IP's integrated in AM243x. Due to pin restrictions, EPWM4_[A:B], EPWM6_[A:B], and EPWM5_B are not available.

          -AM243x uses the Keystone3 EPWM peripheral. It is not related to the C2000 versions of EPWM IP.

    The AM243x TRM can be found at https://www.ti.com/lit/pdf/spruim2

    The Arm Cortex-M4F is part of the MCU domain with separate GPIO domain and designated peripheral set.

    How did you arrive at 16 timers? 

    1. What are you referring to as "IMC" peripheral in the device? The M4FSS NVIC priority levels can be be set as described here: https://developer.arm.com/documentation/100166/0001/Nested-Vectored-Interrupt-Controller/NVIC-functional-description

         -The A53SS supports GIC-500, and each R5F core has designated VIM.

    2. Please create a unique thread for this question in the Code Composer Studio E2E Group.

    3. No analog comparator peripherals exist in the AM243x device. ECAP peripheral can be used to trigger state changes in the EPWM peripheral when properly configured.

    4. The LP-AM243 currently uses the XAM2434x (ALX) package device. ALV package devices are only available for the TMDS243GPEVM.

  • Hi Fleenor,

    What are you referring to as "IMC" peripher

    Was thinking interrupt master controller or GIC prior to finding the TRM link. Questions 1-3 Answered my-self after finding the TRM link in the datasheet, not on the LP-AM243 web page likely since it is over 100MB.

      -AM243x uses the Keystone3 EPWM peripheral. It is not related to the C2000 versions of EPWM IP.

    Yet the very same EPWM layout (Action qualifiers, Sub Modules etc..) exists in TMS320280049c type 4 module and other C2000 MCU's. Hence asked not answered if Instaspin FAST estimator was embedded LP-AM243?

    How did you arrive at 16 timers? 

    Table 5-1 Timers: 16 (4 in MCU Domain)

    The LP-AM243 currently uses the XAM2434x (ALX) package device.

    The ALX 10 bit ADC would not work for the intended purpose of motor control as sample precision would limit parts of the migration.

    Thanks for the Info Nerd

  • Hey there,

    You are welcome Slight smile

    1) Understood, regardless of the TI TRM nomenclature, expected interrupt functionality should still be consistent with expectations from IMC.

    2) While the AM243x Keystone3 EPWM does come from the same PWM IP lineage as the C2000 EPWM peripherals, there are various features that have been added in the C2000 IP versions that are not be available in AM243x.

    3) Understood, the AM243x contains 12 instances of Dual-Mode Timer (DMTIMER) in the MAIN domain and 4 instances in the MCU domain. It also contains one Global Timebase Counter (GTC) instance in MAIN domain. There are also 7 Windowed Digital Watchdog Timers (1 per CPU), but these are limited to Watchdog functionality only and cannot be used as general purpose timers.

    Best Regards,

    Zackary Fleenor