TM4C123BH6ZRB: ADC Dither Enable

Hi,

  I have not seen this bit used and there is no API to enable this feature. Actually this is the first time I have come across this feature. My understanding of the dither is to improve the quantization noise performance. In another word, dithering is used to minimize the effects of ADC quantization noise, by adding noise to the analog signal prior to conversion. If ADC is giving you accurate conversion then I will suggest you not use this bit as I don't know the effect of dithering across the range of your input frequency and how frequent you are sampling the inputs. If you really want to experiment with it, you will need to manually write to the register as there is no API from TivaWare. 

Dither Enable
The DITHER bit in the ADCCTL register is used to reduce random noise in ADC sampling and keep
the ADC operation within the specified performance limits defined in Table 24-33 on page 1389. When
taking multiple consecutive samples with the ADC Module, the DITHER bit should be enabled in
the ADCCTL register along with hardware averaging in the ADC Sample Averaging Control
(ADCSAC) register. The DITHER bit is disabled by default at reset.

I also find the below article helpful about dithering. 

https://www.mwrf.com/technologies/components/article/21846556/reducing-adc-quantization-noise