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Pins stated during and after reset

Fred P
Expert 2235 points

I am searching for 2 important and simple things:

  -Pins state during reset

  -Default pins state after reset

 

The documentation about that seems to be spread all over the Technical Reference Manual and incomplete at best.

 

Some registers reset values are given but others are marked as device dependant (ie: DCAN TIOC register).  Where is the device dependant documentation?  There is only one datasheet that includes all the TMS570 variations and I haven’t found anything about registers reset value in there.

 

Similarly, in both the GIO, LIN and SCI modules chapters of the TRM, it is written that the pins state under reset is device dependant and configurable.  I can’t find anything more specific (a register name, for instance).

 

Where can I get all the reset and pins state stuff for both POR and "classical" reset?

Regards,

Frederic P.

  • 0
    Genius 4130 points

    Did Fred ever get a reply to this?

    I would be interested in the answer.

    Regards, Tony.

  • 0 in reply to Tony Morrell
    Expert 2235 points

    Hi Tony,

    Never had any answer and I don't remember if I came to any conclusion about that.

    Sorry...

    However, there were some people at TI that came back to me last week to know if I still needed answers to 3-4 of my posts from last spring.  A little outdated isn't it?

    You may as well repost and get support ths time!

    Frederic

  • 0
    TI__Mastermind 49120 points

    Hello Frederic,

    First of all, please accept our sincerest apologies for completely losing the ball on this post.

    Thank you also for identifying a deficiency in our documentation - we will strive to correct this in our next update.

    When the power-on reset signal (nPORRST) is asserted (driven low), most pins are isolated from the internal connections. The exceptions to this rule are the signals that are required to affect the mode of the microcontroller (JTAG, TEST, OSCIN, OSCOUT). We will update this post to provide a comprehensive list if I have missed any signals.

    Also, when nPORRST = 0, there are no pulls on the I/Os and input-only pins. These pins are effectively tri-stated (floating).

    Once nPORRST is released (pulled or driven High), the default pull states take effect on the I/Os and input-only signals. The communication module terminals have a default pull-up - these are the LINx, MibSPIx, DCANx I/Os. The other functional I/Os have a default pull-down. These are GIOx, NHETx I/Os. The FlexRay RX terminals also have a fixed pull-down.

    Regards, Sunil