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TMS570LC4357: PBIST DLR register bit 3 treated inconsistently in LC43x TRM

Part Number: TMS570LC4357

In SPNU563A, the LC43x TRM, the description of the PBIST DLR register (section 9.5.2) says that bit 3 should not be changed from its default value of 1.

However, sections 9.3, 9.3.1, 9.6.1, and 9.6.2 all specify starting testing by writing 0x14 (note: bit 3 is 0) to DLR.