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AM2431: Is this a valid use case for the OSPI0 port

Fangjia Zhu
Prodigy 80 points

Part Number: AM2431

Hello,

Is below a valid use case for the OSPI0 port? i.e. share the clock, D0..D3 or D0&D1 for a boot flash, D4-D7 for a quad SPI going to another device, the two devices do not need to be access at the same time (CS0 and CS1 won't assert simultaneously):

Thanks,

Fang

  • 0
    TI__Guru 57275 points

    Hi Fang,

    I do not think above is a valid use case of the OSPI0 port.

    The valid use case should be D0 - D7 are connected to both "Boot Device" and "Some SPI Device". The CS0 or CS1 decides which SPI device is in use.

    Best regards,

    Ming

  • 0 in reply to Ming Wei
    Prodigy 80 points

    Thanks! If I read the datasheet right it looks like the OSPI0 pins are in push-pull modes rather than open drain? So connecting two together is not a valid option for us.

  • 0 in reply to Fangjia Zhu
    TI__Mastermind 33853 points

    Hey Fang,

    You are correct, the OSPI0 pins are implemented on the typical LVCMOS push-pull voltage buffer. Unfortunately, as Ming mentioned, this is not a valid use case as the OSPI peripheral will not support 2 concurrent QSPI flash devices (one on D0:D3 and the other D4:D7).

    Best Regards,

    Zackary Fleenor