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TMS570LS0914: CAN Bootloader issue

Part Number: TMS570LS0914
Other Parts Discussed in Thread: TMS570LS0714, , HALCOGEN

Hi, Im'm trying to compile a CAN bootloader for this microcontroller. Basically I saw on this forum someone sayig to use the example provided for TMS570LS0714, but actually, besides I was able to compile and flash it on the device, it seems like I can not get CAN comunication working.

Basically whenever I try to send the "Download Command" message, the can buffer show "0x88,0x88,0x88,0x88,0x88,0x88,0x88,0x88, so g_ulTransferAddress and g_ulTransferSize are both 0x88888888888888.

I'm not sure what I'm missing, I tried with RM46 launchpad and the example was working fine. I also defined the sectors as for the TMS570LS0914, so basically I'm not sure what I'm missing.

Does anyone have an example specific for this Microcontroller? Am I missing something? It is a bit upsetting the fact that there is documetatio for bootlaoder for this device an no source code from TI actually....

  this is the bl_link.cmd file

 this is what i get when sending this fro PCAN Explorer 

  • I already used that one. It is not clear to me however what files need to be changed for it to work with the TMS570LS0914. If i change the target in the project and upload it, I cannot receive correctly the data form the CANbus. When I send the message 0x5A1 it is stuck in some funcitons finside the "GET_ADDRESS_SIZE" case and stop working.

    One thing that I noticed is that in the example provided for the TMS570LS0714 the sys_clock_freq is 180 by the example.. should it be 80? 

    Thanks

  • Could you please check if the flash_defines.h and the bl_link.cmd file are correct? because there is actual no information on this in the forum... here they are

    bl_link.cmd

    And this is what i was referring to regarding the sys_clock_freq in the example provided on your git

  • TMS570LS0914 supports two packages: 144-pin PGE and 100-pin PZ package.

    144-pin: maximum CPU speed is 160MHz

    100-pin: maximum CPU speed is 100MHz

    The bootloader example in the repo had been tested. But the example is only for 144-pin PGE package.

  • Hi, My package is the 144 PGE; however, I tested you example, but it is not working...

    The points I'm missing out are:

    1)My concern is not the max frequency, as I know that the 144 PGE 914 have a 160MHz; the example provided, as I mentioned, report 180MHz as sys_clock_frequency; this was not changed by me, that is the example you're mentioning. So what I want to understand is if it is a bug or not.

    2)I uploaded the example. I'm trying to send the "Download message" on 0x5A1, but the micro is stucking inside the case statement. It is not easy to understand where, so for this reason, I want to make sure that both flash_defines.h file and bl_link.cmd are correct. Could you please check them? This would mean a lot; or if they need to stay the same as the example.. As far as I know the 914 should have 2 more sectors right? so I should need to add them right? 

    3)The main issue I tracked until now is that when I send the message with address and image size (0x00010020 and 71200), the g_ulTransferAddress and g_ulTransferSize are both 0x8888888 and not the correct vlaues. If I modifiy the CAN reading, I can get correct values, but only changin this parameter 

    static const uint32_t g_ulCanByteOrder[] = {3U, 2U, 1U, 0U, 7U, 6U, 5U, 4U}; 

    to 

    static  uint32_t g_ulCanByteOrder[8] = {3, 2, 1, 0, 7, 6, 5, 4}; 

    this is not so clear to me;

    4) You mentioned the fact that this example is for 144-pin PGE and tested; however the sys_clock_freq in your example is 180... in HALCogen the settings shows 80MHz.. maybe I'm missing something but how should it work out of the box ? 

    I know it is not so easy to debug issues remotely, but this bootloader is a big step in our development with this microcontroller so I would like to make it work. 

    Thanks in advance QJ.

  • Hi,

    The HALCoGen generated code is:

        static const uint32 s_canByteOrder[8U] = {3U, 2U, 1U, 0U, 7U, 6U, 5U, 4U};

    In my bootloader example, the const is copied to SRAM. Can you modify your linker cmd file like:

    /*----------------------------------------------------------------------------*/
    /* Linker Settings */

    --retain="*(.intvecs)"

    /* USER CODE BEGIN (1) */
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Memory Map */

    MEMORY
    {
    VECTORS (X) : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
    FLASH0 (RX) : origin=0x00000020 length=0x000BFFE0 vfill = 0xffffffff
    SRAM (RW) : origin=0x08002000 length=0x0001EB00
    STACK (RW) : origin=0x08000000 length=0x00001500
    /* USER CODE BEGIN (2) */
    #if 1
    ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
    length=(size(VECTORS) >> 3)
    ECC={algorithm=algoL2R4F021, input_range=VECTORS}

    ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3))
    length=(size(FLASH0) >> 3)
    ECC={algorithm=algoL2R4F021, input_range=FLASH0 }
    #endif
    /* USER CODE END */
    }

    /* USER CODE BEGIN (3) */
    ECC
    {
    algoL2R4F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
    hamming_mask = R4 /* Use R4/R5 build in Mask */
    parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */
    mirroring = F021 /* RM57Lx and TMS570LCx are build in F021 */
    }
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Section Configuration */


    SECTIONS
    {
    .intvecs : {} > VECTORS

    flashAPI:
    {
    .\source\Fapi_UserDefinedFunctions.obj (.text, .data)
    .\source\bl_flash.obj (.text, .data)
    --library= "c:\ti\Hercules\F021 Flash API\02.01.01\F021_API_CortexR4_BE.lib" (.text, .data)
    } palign=8 load = FLASH0, run = SRAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize)

    .text : {} palign=8 > FLASH0
    .const : {} palign=8 > FLASH0 //load=FLASH0, run = SRAM, LOAD_START(constLoadStart), RUN_START(constRunStart), SIZE(constLoadSize)
    .cinit : {} > FLASH0
    .pinit : {} > FLASH0
    .data : {} > SRAM
    .bss : {} > SRAM
    .sysmem : {} > SRAM

    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }

    /* USER CODE BEGIN (5) */
    /* USER CODE END */

    It is not needed to copy "const" from flash to SRAM in main().

  • If you use the modified linker cmd mentioned in my last message, the const for flash_sector should be removed:

    #if defined (TMS570LS07) || defined (RM44)
    #define NUMBEROFSECTORS 12
    const SECTORS flash_sector[NUMBEROFSECTORS]=
    {

  • Hi, 

    I just tried but I get compi.ing errors:

    Building target: "ls07_can_boot.out"
    Invoking: Arm Linker
    "D:/Programmi/ti/ccs1100/ccs/tools/compiler/ti-cgt-arm_20.2.5.LTS/bin/armcl" -mv7R4 --code_state=32 --float_support=VFPv3D16 -g --diag_warning=225 --diag_wrap=off --display_error_number --enum_type=packed --abi=eabi -z -m"ls07_can_boot.map" --heap_size=0x800 --stack_size=0x800 -i"D:/Programmi/ti/ccs1100/ccs/tools/compiler/ti-cgt-arm_20.2.5.LTS/lib" -i"D:/Programmi/ti/ccs1100/ccs/tools/compiler/ti-cgt-arm_20.2.5.LTS/include" --reread_libs --diag_wrap=off --display_error_number --warn_sections --ecc=on --xml_link_info="ls07_can_boot_linkInfo.xml" --rom_model --be32 -o "ls07_can_boot.out" "./TMS570LS07x/source/can.obj" "./TMS570LS07x/source/dabort.obj" "./TMS570LS07x/source/errata_SSWF021_45.obj" "./TMS570LS07x/source/esm.obj" "./TMS570LS07x/source/gio.obj" "./TMS570LS07x/source/notification.obj" "./TMS570LS07x/source/pinmux.obj" "./TMS570LS07x/source/rti.obj" "./TMS570LS07x/source/sci.obj" "./TMS570LS07x/source/spi.obj" "./TMS570LS07x/source/sys_core.obj" "./TMS570LS07x/source/sys_dma.obj" "./TMS570LS07x/source/sys_intvecs.obj" "./TMS570LS07x/source/sys_mpu.obj" "./TMS570LS07x/source/sys_pcr.obj" "./TMS570LS07x/source/sys_phantom.obj" "./TMS570LS07x/source/sys_pmm.obj" "./TMS570LS07x/source/sys_pmu.obj" "./TMS570LS07x/source/sys_selftest.obj" "./TMS570LS07x/source/sys_startup.obj" "./TMS570LS07x/source/sys_vim.obj" "./TMS570LS07x/source/system.obj" "./source/Fapi_UserDefinedFunctions.obj" "./source/bl_check.obj" "./source/bl_copySections2SRAM.obj" "./source/bl_dcan.obj" "./source/bl_flash.obj" "./source/bl_led_demo.obj" "./source/bl_main.obj" "./source/bl_spi.obj" "./source/bl_spi_packet.obj" "./source/bl_uart.obj" "./source/bl_ymodem.obj" "./source/sci_common.obj" "./source/sw_hw_ver.obj" "./source/ymodem_crc16.obj" "C:/Users/persico_a/Desktop/hercules_examples/Bootloaders/SafetyMCU_Bootloaders/TMS570LS07x/bl_link.cmd" -l"c:/ti/Hercules/F021 Flash API/02.01.01/F021_API_CortexR4_BE.lib" -lrtsv7R4_T_be_v3D16_eabi.lib
    <Linking>

    undefined first referenced
    symbol in file
    --------- ----------------
    constLoadSize ./source/bl_main.obj
    constLoadStart ./source/bl_main.obj
    constRunStart ./source/bl_main.obj

    error #10234-D: unresolved symbols remain
    error #10010: errors encountered during linking; "ls07_can_boot.out" not built

    >> Compilation failure
    makefile:181: recipe for target 'ls07_can_boot.out' failed
    gmake[1]: *** [ls07_can_boot.out] Error 1
    makefile:177: recipe for target 'all' failed
    gmake: *** [all] Error 2

    **** Build Finished ****

  • Ok so I tried by commenting memcpy(&constRunStart, &constLoadStart, (uint32)&constLoadSize); and it compiled.

    I flashed it but the error is still present: when I send the command 5A1 (GET_ADDRESS_SIZE) the micro is stuck inside the case; I don't know where, I'm trying to figure out. I don't get any ack message back and if i ping the device is not ack back. DO you know if there are other things t change? sys_clock_freq? 

  • For CAN communication, the all the nodes on the network should have the same baudrate. Otherwise, the receiver won't ACK the message.  

  • Hi,

    but the communication is working. I can Ping and have the acknowledge back. Commands are working, but when I start sending the download command (image address + image_size) it receive both information correctly but then it is stuck inside the check for flash address and size ora fapi erase.

  • I can confirm that both nodes are correctly set up. Baud rate 500kbits/s. Seems more like an issue on the code . The flash defines, for 914 PGE , should have 12 or 14 sectors? Can it be that maybe that?

    thanks in advance 

  • Do you mean you get correct g_ulTransferAddress and g_ulTransferSize? 

    and your code gets stuck in BLInternalFlashStartAddrCheck() function?

    Can you please step into the function and figure out the root cause?

    uint32_t
    BLInternalFlashStartAddrCheck(uint32_t ulAddr, uint32_t ulImgSize)
    {
    uint32_t count=0, i;

    uint32_t ulWholeFlashSize;

    //
    // Determine the size of the flash available on the part in use.
    //
    ulWholeFlashSize = (uint32_t)flash_sector[NUMBEROFSECTORS-1].start + flash_sector[NUMBEROFSECTORS-1].length;

    /* The start address must be at the beginning of the sector */
    for (i = 0; i < NUMBEROFSECTORS; i++){
    if ((ulAddr >= (uint32_t)(flash_sector[i].start)) && (ulAddr < ((uint32_t)flash_sector[i].start + flash_sector[i].length)))
    {
    count++;
    }
    }
    if (count == 0){
    return(0);
    }

    //
    // Is the address we were passed a valid start address? We allow:
    //
    // 1. Address 0 if configured to update the boot loader.
    // 2. The start of the reserved block if parameter space is reserved (to
    // allow a download of the parameter block contents).
    // 3. The application start address specified in bl_config.h.
    //
    // The function fails if the address is not one of these, if the image
    // size is larger than the available space or if the address is not word
    // aligned.
    //
    if((
    #ifdef ENABLE_BL_UPDATE
    (ulAddr != 0) &&
    #endif
    (ulAddr != APP_START_ADDRESS)) ||
    ((ulAddr + ulImgSize) > ulWholeFlashSize) ||
    ((ulAddr & 3) != 0))
    {
    return(0);
    }
    else {
    return(1);
    }
    }

  • Hi,

    I had not so much time to dig in it but it seems like if I comment that funciton it is then stuck in fapi_block_erase function. I've seen other people already with this issue but none of them posted any result. In my opinion there is something that's not working correclty in how the flash_defines.h is set up or something the bl_link.cmd. I'm saying this only because i use in my software application the TI_FEE driver and I dind't have any problem before starting with the bootloader. 

    Could you please check if the flash_defines.h I posted in some prior messages is correct? If not could you point what I'm doing wrong? The fact is that everybody is saying that the example is straightforward for the 914, but it is not actually:

    -flash defnes need to be changed

    - Sys clock frequency is not correct as the example (180Hz and 100 Hz in HALCogen, and in any case 180 Hz is more than what is admitted for that micro)

    - bl_link.cmd needs some modification.

    I know that probably you are a guru in this topic because I've already seen your contributes in git and in other threads, could you provide me a working bootloader example/or point me what is needed to be changed to work with TMS570LS0914PGE?

    Thanks in advance!

  • Hi QJ Wang,

    Thank you so much, really appreciated. I'l wait, thanks in advance! 

  • I run LS0714 bootloader today, it works fine. 

    it receive both information correctly but then it is stuck inside the check for flash address and size ora fapi erase.

    BLInternalFlashStartAddrCheck(g_ulTransferAddress,  g_ulTransferSize))

    The image size is bigger than the size of flash space for application image. Or you get wrong address or image size.

    like if I comment that funciton it is then stuck in fapi_block_erase function.

    Fapi_BlockErase(uint32_t ulAddr, uint32_t Size)

    Please double check the ulAddr and Size to make sure it is in the valid range. LS0914 has only one flash bank. You need to execute the code from SRAM. Please check if bl_flash.* and Flash APIs are copied to SRAM.

  • For the first part of your answer, I could say that the bin file is a 71kb file so probably you are right , is it that the 914 is 64 or 68kb? 

    for the second answer, how can I check that? 

  • The flash size of LS0914 is 1024KB.

    You can add a breakpoint to the following instruction in bl_dcan.c to check the address and size:

  • nono that is what i've already done, I mean how can i step trhought that function ? i can confirm that both adderss size and adress are received correctly. Do you ran the code with the LS0914 to be sure it is working fine?  Did you use the the modified bl_link.cmd? 

    Then other two question: to use the modified cmd link i had to comment the line memcpy(&constRunStart, &constLoadStart, (uint32)&constLoadSize);is this ok? if not what do i need to do ?

    and finally how can i check if bl_flash.* and Flash APIs are copied to SRAM? thanks

  • so an update:

    to overcome the blInternalFlashStartAddressCheck i had to modify the bl_link.cmd as below:

    SECTIONS
    {
    .intvecs : {} > VECTORS

    flashAPI:
    {
    .\source\Fapi_UserDefinedFunctions.obj (.text, .data)
    .\source\bl_flash.obj (.data)
    --library= "c:\ti\Hercules\F021 Flash API\02.01.01\F021_API_CortexR4_BE.lib" (.text, .data)
    } palign=8 load = FLASH0, run = SRAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize)

    .text : {} palign=8 > FLASH0
    .const : {} palign=8 > FLASH0 //load=FLASH0, run = SRAM, LOAD_START(constLoadStart), RUN_START(constRunStart), SIZE(constLoadSize)
    .cinit : {} > FLASH0
    .pinit : {} > FLASH0
    .data : {} > SRAM
    .bss : {} > SRAM
    .sysmem : {} > SRAM

    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }

    and I had to re-include the const in 

    #if defined (TMS570LS07) || defined (RM44)
    #define NUMBEROFSECTORS 12
    const SECTORS flash_sector[NUMBEROFSECTORS]=

    at this point however Im stuck in FapiBlockErase. sys_clock_freq as from the example

    Do I missed something?

  • I tracked down and it seems that the code is stuck in 

     if ((Fapi_initializeFlashBanks((uint32_t)SYS_CLK_FREQ)) == Fapi_Status_Success){

    do I have to change the sys_clock? to wich value? i already tried 100, 160 and 80 

  • do I have to change the sys_clock? to wich value?

    It depends on the system clock (HCLK) in your configuration. 

  • ho QJ Wang,

    yesterday I did some test modifying the bl_link.cmd, if I remove the line in red the fapi block erase works, but at this point the flash_sectors structure is not set with the correct information as defined in flash_defines, I can see every value inside that structure is 0xFFFFF. This cause the software to replying me with a cmd_fail if I send the address and image_size, as it cannot check the flash sector correctly.

    could you point why const is needed (and where) or not? It seems like it is the one causing issues

  • Hi QJ,

    so right now this is the situation and these are the test i did without success on a TMS570LS0914 PGE:

    modifying the bl_link.cmd as this

    /* Copyright (C) 2013-2019 Texas Instruments Incorporated - http://www.ti.com/
    *
    *
    * Redistribution and use in source and binary forms, with or without
    * modification, are permitted provided that the following conditions
    * are met:
    *
    * Redistributions of source code must retain the above copyright
    * notice, this list of conditions and the following disclaimer.
    *
    * Redistributions in binary form must reproduce the above copyright
    * notice, this list of conditions and the following disclaimer in the
    * documentation and/or other materials provided with the
    * distribution.
    *
    * Neither the name of Texas Instruments Incorporated nor the names of
    * its contributors may be used to endorse or promote products derived
    * from this software without specific prior written permission.
    *
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
    * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
    * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    */

    /*----------------------------------------------------------------------------*/
    /* USER CODE BEGIN (0) */
    /* USER CODE END */


    /*----------------------------------------------------------------------------*/
    /* Linker Settings */

    --retain="*(.intvecs)"

    /* USER CODE BEGIN (1) */
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Memory Map */

    MEMORY
    {
    VECTORS (X) : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
    FLASH0 (RX) : origin=0x00000020 length=0x000BFFE0 vfill = 0xffffffff
    SRAM (RW) : origin=0x08002000 length=0x0001EB00
    STACK (RW) : origin=0x08000000 length=0x00001500
    /* USER CODE BEGIN (2) */
    #if 1
    ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
    length=(size(VECTORS) >> 3)
    ECC={algorithm=algoL2R4F021, input_range=VECTORS}

    ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3))
    length=(size(FLASH0) >> 3)
    ECC={algorithm=algoL2R4F021, input_range=FLASH0 }
    #endif
    /* USER CODE END */
    }

    /* USER CODE BEGIN (3) */
    ECC
    {
    algoL2R4F021 : address_mask = 0xfffffff8 /* Address Bits 31:3 */
    hamming_mask = R4 /* Use R4/R5 build in Mask */
    parity_mask = 0x0c /* Set which ECC bits are Even and Odd parity */
    mirroring = F021 /* RM57Lx and TMS570LCx are build in F021 */
    }
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Section Configuration */


    SECTIONS
    {
    .intvecs : {} > VECTORS

    flashAPI:
    {
    .\source\Fapi_UserDefinedFunctions.obj (.text, .data)
    .\source\bl_flash.obj (.data)
    --library= "c:\ti\Hercules\F021 Flash API\02.01.01\F021_API_CortexR4_BE.lib" (.text, .data)
    } palign=8 load = FLASH0, run = SRAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize)

    .text : {} palign=8 > FLASH0
    .const : {} palign=8 > FLASH0 //load=FLASH0, run = SRAM, LOAD_START(constLoadStart), RUN_START(constRunStart), SIZE(constLoadSize)
    .cinit : {} > FLASH0
    .pinit : {} > FLASH0
    .data : {} > SRAM
    .bss : {} > SRAM
    .sysmem : {} > SRAM

    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }

    /* USER CODE BEGIN (5) */
    /* USER CODE END */

    this allow me to step untile the FapiEraseFunction, that seems not to be exectued as it is stuck on fapi_init

    - Rebuild all the configuration in HALCogen for the tms570ls0914 specific

    - Stepping through the FW 

    - Fixing the wrong vlaue for SYS_CLOCK_FREQ of your example.

    You told me you tested the example, could you please confirm you tested it in which condition? TMS570LS09 or 07 ? because if 07, I would say that is not obvious it will work on the 09.

    Anyway, I'm stuck, as I am not able to understand why it is not working but tou continue to say it is "out of the box". Could you please give a check to the bl_link.cmd i post here ? 

    Is it possible to you to create a specific example for the 09? i know that these micro are similar, but as me as other users as truggling to get it working, it is a loss of time as it is a work project, so basically I don't know why there is no specific support for this micro. Anyway, could you please checks and answer me to the points I mentioned? If you have something that is working for this micro, is it possible to share it with me ? it would be a good starting point for me.

    Thanks in advance

  • Hi,

    You missed .text in .\source\bl_flash.obj, so the .text is not copied to SRAM. 

    Is it possible to you to create a specific example for the 09?

    I can, but I don't have LS09x board to test. 

    I will create one tonight, and you have to do the test on your own board.

  • Hi QJ, 

    i Know, but if I write also .text, it doesn't load the bl_flash on the sram, and when it jumps to blAddressCheck the software is stuck.

    If you can would be perfect, I can test in my own board tonight !

    Thanks!

  • but if I write also .text, it doesn't load the bl_flash on the sram

    It is not correct. The code should be copied.

  • Uhm, I just don't know actually, I did some tests and found out that the bl_link.cmd was not working as it should...

    Anyway, if you could preparare an example specific for the LS0914PGE I could test it whenever it will be available.

    In the meantime, just to be sure: the flash_defines need to be expanded from the 714 to 914 with two additional sectors ? Because the example reports 12 sectors, but I've seen somewhere that 14 are needed.

    Thank you so much for your help!

  • Thank you so much! 
    I’ll try it in an hour and give you a feedback! 

    very appreciated ! 

  • I hope it helps, but please let me know if you need anything else or if you have any other questions.

  • Hi QJ,

    yesterday evening I tried your example and i was able to get it working, downloading an application image and writing it to the flash. However, the application is not working, but i suspect is how it was compiled so not an error on the bootloader code, so thank you!

    Digging in the code i found that in the "flash_defines.h" file the sectors were as below:

    could you confirm it is just a refuse and i need to set 12, 13 accordingly?

    second question (but i don't know if i have to open another thread as it is for the application image):

    - If in my application code the can is configured as 1Mbit and interrupt are used (RTI, CAN, GIO) do they need to be configured the same also in the bootloader? or are they configured whenever it jumps to the application code?

    - when compiling the applicaiton code after offsetting the memory in sys_link.cmd it throws me this error:

    the sys_link.cmd is as this:

    /*----------------------------------------------------------------------------*/
    /* sys_link.cmd */
    /* */
    /*
    * Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
    *
    *
    * Redistribution and use in source and binary forms, with or without
    * modification, are permitted provided that the following conditions
    * are met:
    *
    * Redistributions of source code must retain the above copyright
    * notice, this list of conditions and the following disclaimer.
    *
    * Redistributions in binary form must reproduce the above copyright
    * notice, this list of conditions and the following disclaimer in the
    * documentation and/or other materials provided with the
    * distribution.
    *
    * Neither the name of Texas Instruments Incorporated nor the names of
    * its contributors may be used to endorse or promote products derived
    * from this software without specific prior written permission.
    *
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
    * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
    * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    *
    */

    /* */
    /*----------------------------------------------------------------------------*/
    /* USER CODE BEGIN (0) */
    /* USER CODE END */


    /*----------------------------------------------------------------------------*/
    /* Linker Settings */

    --retain="*(.intvecs)"

    /* USER CODE BEGIN (1) */
    #if 0
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Memory Map */

    MEMORY
    {
    VECTORS (X) : origin=0x00010020 length=0x00000020
    FLASH0 (RX) : origin=0x00010040 length=0x000BFFE0
    STACKS (RW) : origin=0x08000000 length=0x00001500
    RAM (RW) : origin=0x08001500 length=0x0001EB00

    /* USER CODE BEGIN (2) */
    /* USER CODE END */
    }

    /* USER CODE BEGIN (3) */
    #endif

    #if 0
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Section Configuration */

    SECTIONS
    {
    .intvecs : {} > VECTORS
    .text : {} > FLASH0
    .const : {} > FLASH0
    .cinit : {} > FLASH0
    .pinit : {} > FLASH0
    .bss : {} > RAM
    .data : {} > RAM
    .sysmem : {} > RAM

    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }

    /* USER CODE BEGIN (5) */
    #endif
    /* USER CODE END */


    /*----------------------------------------------------------------------------*/
    /* Misc */

    /* USER CODE BEGIN (6) */
    /* USER CODE END */
    /*----------------------------------------------------------------------------*/

    could you confirm that when building the application it is just needed to change the address of VECTORS and FLASH0? Thanks!

  • i was able to get it working, downloading an application image and writing it to the flash.

    Nice to know the bootloader is working on your board.

    could you confirm it is just a refuse and i need to set 12, 13 accordingly?

    Yes, I did copy/past, and changed the start address of sector 12/13, but forgot to change the # of sector. 

    - If in my application code the can is configured as 1Mbit and interrupt are used (RTI, CAN, GIO) do they need to be configured the same also in the bootloader? or are they configured whenever it jumps to the application code?

    You don't need to configure the same in the bootloader. When IRQ or FIQ interrupt occurs, it will jump to the actual interrupt service routine either in bootloader or in your application. If there is a CAN RX interrupt in your application, the code execution will jump to CAN interrupt handler of your application.

    when compiling the applicaiton code after offsetting the memory in sys_link.cmd it throws me this error:

    In my example of CAN bootloader, the bl_link.cmd is used, so I added #if 0 ... #endif in the HAL generated linker.cmd. Please remove the #if 0 and #endif in linker.cmd

  • Thank you much for the help !

    So this was a linker file i created for a simple applicaition to check the functionality.

    /*----------------------------------------------------------------------------*/
    /* sys_link.cmd */
    /* */
    /*
    * Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
    *
    *
    * Redistribution and use in source and binary forms, with or without
    * modification, are permitted provided that the following conditions
    * are met:
    *
    * Redistributions of source code must retain the above copyright
    * notice, this list of conditions and the following disclaimer.
    *
    * Redistributions in binary form must reproduce the above copyright
    * notice, this list of conditions and the following disclaimer in the
    * documentation and/or other materials provided with the
    * distribution.
    *
    * Neither the name of Texas Instruments Incorporated nor the names of
    * its contributors may be used to endorse or promote products derived
    * from this software without specific prior written permission.
    *
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
    * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
    * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
    * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
    * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
    * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
    * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
    * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
    * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    *
    */

    /* */
    /*----------------------------------------------------------------------------*/
    /* USER CODE BEGIN (0) */
    /* USER CODE END */


    /*----------------------------------------------------------------------------*/
    /* Linker Settings */

    --retain="*(.intvecs)"

    /* USER CODE BEGIN (1) */
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Memory Map */

    MEMORY
    {
    VECTORS (X) : origin=0x00010020 length=0x00000020
    FLASH0 (RX) : origin=0x00010040 length=0x000FFFE0
    STACKS (RW) : origin=0x08000000 length=0x00001500
    RAM (RW) : origin=0x08001500 length=0x0001EB00

    /* USER CODE BEGIN (2) */
    /* USER CODE END */
    }

    /* USER CODE BEGIN (3) */
    /* USER CODE END */

    /*----------------------------------------------------------------------------*/
    /* Section Configuration */

    SECTIONS
    {
    .intvecs : {} > VECTORS
    .text : {} > FLASH0
    .const : {} > FLASH0
    .cinit : {} > FLASH0
    .pinit : {} > FLASH0
    .bss : {} > RAM
    .data : {} > RAM
    .sysmem : {} > RAM

    FEE_TEXT_SECTION : {} > FLASH0
    FEE_CONST_SECTION : {} > FLASH0
    FEE_DATA_SECTION : {} > RAM

    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }

    /* USER CODE BEGIN (5) */
    /* USER CODE END */


    /*----------------------------------------------------------------------------*/
    /* Misc */

    /* USER CODE BEGIN (6) */
    /* USER CODE END */
    /*----------------------------------------------------------------------------*/

    this one should be fine right? 

    Thanks!