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TMS570LS3137-EP: MibSPI5 internal loopback not working

Part Number: TMS570LS3137-EP


Hello,

In our design, we are using SIMO[1] (Bit 17, PC0) and SOMI[1] (Bit 25, PC0) of MibSPI5. With this, if we enable internal loopback, data is not getting received at RXRAM. But If I configure SIMO[0] and SOMI[0] as functional pins, I could see data in RXRAM.

Is there any relation between SPI functional pin configurations and internal loopback test or am I missing something in my configuration.

Thanks,

Jai

  • Hi Jai,

    SIMO[3:1] and SOMI[3:1] are sued for MibSPI parallel mode. The parallel mode can increase the communication throughput by sending data over more than one data line (parallel 2, 4, or 8). Parallel mode is enabled by setting the PMODEx bits of SPIPMCTRL register.

    Only SIMO[0] and SOMI[0] can be used for no-parallel mode, so your observation is correct.