Hello,
In our design, we are using SIMO[1] (Bit 17, PC0) and SOMI[1] (Bit 25, PC0) of MibSPI5. With this, if we enable internal loopback, data is not getting received at RXRAM. But If I configure SIMO[0] and SOMI[0] as functional pins, I could see data in RXRAM.
Is there any relation between SPI functional pin configurations and internal loopback test or am I missing something in my configuration.
Thanks,
Jai