TMS570LS1227: Execution of TI FEE Driver from RAM

/** @file HL_sys_main.c 
*   @brief Application main file
*   @date 07-July-2017
*   @version 04.07.00
*
*   This file contains an empty main function,
*   which can be used for the application.
*/

/* 
* Copyright (C) 2009-2016 Texas Instruments Incorporated - www.ti.com  
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

/* Include Files */

/* USER CODE BEGIN (0) */
/* USER CODE END */

#include "sys_common.h"

/* USER CODE BEGIN (1) */
#include "sys_core.h"
#include "system.h"
#include "ti_fee.h"
/* USER CODE END */

/** @fn void main(void)
*   @brief Application main function
*   @note This function is empty by default.
*
*   This function is called after startup.
*   The user can use this function to implement the application.
*/

/* USER CODE BEGIN (2) */
extern uint32_t RamfuncsLoadStart;
extern uint32_t RamfuncsLoadSize;
extern uint32_t RamfuncsRunStart;


void Delay(void);
void FEE_Init(void);
void FEE_Write(void);
Fapi_StatusType Flash_Init(void);


void Delay(void)
{
	volatile uint32_t i;

	for (i = 0U; i < 100U; i++)
	{
	}
}

void FEE_Init(void)
{
	TI_FeeModuleStatusType status;

	/* Initialize the TI FEE */
	TI_Fee_Init();

	/* Wait till the FEE is in IDLE State */
	do
	{
		TI_Fee_MainFunction();
		Delay();
		status = TI_Fee_GetStatus(0U);
	} while (status != IDLE);
}

void FEE_Write(void)
{
	Std_ReturnType result = (Std_ReturnType)E_OK;        /* Variable to hold the return value of the write function */
	TI_FeeJobResultType jobstatus;                      /* Variable to hold the last job result */
	TI_FeeModuleStatusType status;
	uint8_t feedata[64] = {0xAAU, 0xBBU, 0xCCU, 0xDDU, 0xEEU, 0xFFU, 0x11U, 0x22U};

	/* Write the block into the EEP Synchronously */
	result = TI_Fee_WriteSync(1U, feedata);
	if (result == (Std_ReturnType)E_OK)
	{
		status = TI_Fee_GetStatus(0U);
		jobstatus = TI_Fee_GetJobResult(0U);
		if ((status != IDLE) || (jobstatus != JOB_OK))
		{
			/* Operation failed */
			result = (Std_ReturnType)E_NOT_OK;
		}
	}
}

#pragma CODE_SECTION(Flash_Init, ".TI.ramfunc");
Fapi_StatusType Flash_Init(void)
{
	Fapi_StatusType ret;

	/* Disable Interrupts */
	_disable_IRQ_interrupt_();

	/* Initialize the Flash Memory Banks before performing any operation */
	ret = Fapi_initializeFlashBanks((uint32_t)HCLK_FREQ);

	/* Enable Interrupts */
	_enable_interrupt_();

	return ret;
}


#pragma CODE_SECTION(Flash_Write, ".TI.ramfunc");
Fapi_StatusType Flash_Write(void)
{
	Fapi_StatusType ret;
	uint8_t data[8] = {0x01U, 0x02U, 0x03U, 0x04U, 0x05U, 0x06U, 0x07U, 0x08U};

	/* Disable Interrupts */
	 _disable_IRQ_interrupt_();

	ret = Fapi_setActiveFlashBank((Fapi_FlashBankType)0);
	ret = Fapi_enableMainBankSectors(0xFFFF);

	while (FAPI_CHECK_FSM_READY_BUSY != Fapi_Status_FsmReady);

	ret = Fapi_issueProgrammingCommand((uint32_t *)0x80000U, data, (uint8_t)8U, NULL, 0U, Fapi_AutoEccGeneration);

	while (FAPI_CHECK_FSM_READY_BUSY == Fapi_Status_FsmBusy);
	while (FAPI_GET_FSM_STATUS != Fapi_Status_Success);

	/* Enable Interrupts */
	_enable_interrupt_();

	return ret;
}

/* USER CODE END */

int main(void)
{
/* USER CODE BEGIN (3) */
	memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);

    Flash_Init();
    FEE_Init();

    Flash_Write();
    FEE_Write();

	for (;;)
	{
	}
/* USER CODE END */

    return 0;
}


/* USER CODE BEGIN (4) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* sys_link.cmd                                                               */
/*                                                                            */
/* 
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com  
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

/*                                                                            */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN (0) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Linker Settings                                                            */

--retain="*(.intvecs)"

/* USER CODE BEGIN (1) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
	/* Add a vfill directive to the end of each line that maps to Flash */
    VECTORS (X)  : origin=0x00000000 length=0x00000020 vfill = 0xffffffff
    FLASH0  (RX) : origin=0x00000020 length=0x0013FFE0 vfill = 0xffffffff
    STACKS  (RW) : origin=0x08000000 length=0x00001500
    RAM     (RW) : origin=0x08001500 length=0x0002EB00
/* USER CODE BEGIN (2) */
	/* Add memory regions corresponding to the ECC area of the flash bank */
	ECC_VEC (R) : origin=(0xf0400000 + (start(VECTORS) >> 3))
	length=(size(VECTORS) >> 3)
	ECC={algorithm=algoL2R5F021, input_range=VECTORS}
	ECC_FLA0 (R) : origin=(0xf0400000 + (start(FLASH0) >> 3))
	length=(size(FLASH0) >> 3)
	ECC={algorithm=algoL2R5F021, input_range=FLASH0 }
/* USER CODE END */
}

/* USER CODE BEGIN (3) */
/* Add an ECC {} directive describing the algorithm that matches the device */
ECC
{
	algoL2R5F021 : address_mask = 0xfffffff8 /*Address Bits 31:3 */
	hamming_mask = R4 /*Use R4/R5 build in Mask */
	parity_mask = 0x0c /*Set which ECC bits are Even & Odd parity */
	mirroring = F021 /*RM57Lx and TMS570LCx are build in F021*/
}
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > VECTORS
    .text    : {} > FLASH0 
    .const   : {} > FLASH0 
    .cinit   : {} > FLASH0 
    .pinit   : {} > FLASH0 
    .bss     : {} > RAM
    .data    : {} > RAM
    .sysmem  : {} > RAM
    
    FEE_TEXT_SECTION : {} > FLASH0 
    FEE_CONST_SECTION : {} > FLASH0
    FEE_DATA_SECTION : {} > RAM

/* USER CODE BEGIN (4) */
    .TI.ramfunc align(32) : {	-l F021_API_CortexR4_BE_V3D16.lib(.text) }
								LOAD=FLASH0, RUN=RAM,
								LOAD_START(RamfuncsLoadStart),
								RUN_START(RamfuncsRunStart),
								SIZE(RamfuncsLoadSize)
/* USER CODE END */
}

/* USER CODE BEGIN (5) */
/* USER CODE END */


/*----------------------------------------------------------------------------*/
/* Misc                                                                       */

/* USER CODE BEGIN (6) */
/* USER CODE END */
/*----------------------------------------------------------------------------*/