AM2431: UART with FIFO : How to detect the end of transmission in interrupt

I have found probably the same issue with leads to conclusion that this feature is not supported. 
https://e2e.ti.com/support/processors-group/processors/f/processors-forum/943209/am3358-ep-determine-end-of-uart-data-tx

We will try to workaround this by loopbacking the data and setting the "Rx time-out".

Marek,

It appears that the UART_intr2Enable() and UART_intr2Status() API's are what you can use to enable and detect a receive FIFO empty interrupt. For a complete list of UART API's refer to API's for UART.
 

Also, look into the UART_IE2 Register. Please let me know if you are able to enable and detect an interrupt for empty fifo buffer and shift register using these API's 

Regards,

Erik

Erik,

Thank you for hint. To minimize error i switched to LP and official demos and it was failure.

I run the official demo "uart_echo_low_latency_interrupt_am243x-lp_r5fss0-0_nortos_ti-arm-clang" from SDK (C:\ti\mcu_plus_sdk_am243x_08_02_00_31) on LP-AM243.

This demo has the necessary function calls and i thought even author intention was to block until done. But he failed as I'm failing. 

Full code:

static void App_uartUserISR(void *arg)
{
    UART_AppPrms  *appPrms     = (UART_AppPrms *) arg;
    uint32_t       intrType;

    intrType = UART_getIntrIdentityStatus(appPrms->baseAddr);

    /* Check RX FIFO threshold is set */
    if((intrType & UART_INTID_RX_THRES_REACH) == UART_INTID_RX_THRES_REACH)
    {
        uint32_t       readSuccess;
        uint8_t       *readBuf, readChar;

        /* Read all data from RX FIFO */
        readBuf = (uint8_t *)appPrms->readBuf + appPrms->readCount;
        while(1)
        {
            readSuccess = UART_getChar(appPrms->baseAddr, &readChar);
            if(readSuccess == TRUE)
            {
                if(appPrms->readCount >= APP_UART_BUFSIZE)
                {
                    /* Rx buffer overflow */
                    appPrms->rxOverflow = TRUE;
                }
                else
                {
                    /* Store data in buffer */
                    *readBuf = readChar;
                    readBuf++;
                    appPrms->readCount++;
                }
            }
            else
            {
                break;      /* No data left in FIFO */
            }
        }

        if(appPrms->rxOverflow == TRUE)
        {
            /* Stop processing further data */
            UART_intrDisable(appPrms->baseAddr, UART_INTR_RHR_CTI);
        }
    }

    /* Check TX FIFO threshold is set */
    if((intrType & UART_INTID_TX_THRES_REACH) == UART_INTID_TX_THRES_REACH)
    {
        uint32_t       numBytesToTransfer;
        const uint8_t *writeBuf;

        if(appPrms->writeSizeRemaining > 0U)
        {
            numBytesToTransfer = appPrms->writeSizeRemaining;
            if(numBytesToTransfer > appPrms->txTrigLvl)
            {
                /* Write only threshold level of data */
                numBytesToTransfer = appPrms->txTrigLvl;
            }
            appPrms->writeSizeRemaining -= numBytesToTransfer;

            /* Send characters upto FIFO threshold level or until done */
            writeBuf = appPrms->writeBuf + appPrms->writeCount;
            while(numBytesToTransfer != 0U)
            {
                UART_putChar(appPrms->baseAddr, *writeBuf);
                writeBuf++;
                numBytesToTransfer--;
                appPrms->writeCount++;
            }

            if(appPrms->writeSizeRemaining == 0U)
            {
                /* Write complete  - disable TX interrupts */
                appPrms->txDataSent = TRUE;
                UART_intrDisable(appPrms->baseAddr, UART_INTR_THR);
                UART_intr2Enable(appPrms->baseAddr, UART_INTR2_TX_EMPTY);
            }
        }
        else
        {
            /* Disable interrupt */
            UART_intrDisable(appPrms->baseAddr, UART_INTR_THR);
        }
    }

    /* Check if TX FIFO is empty */
    if(appPrms->txDataSent == TRUE)
    {
        intrType = UART_getIntr2Status(appPrms->baseAddr);
        if((intrType & UART_INTR2_TX_EMPTY) != 0U)
        {
            UART_intr2Disable(appPrms->baseAddr, UART_INTR2_TX_EMPTY);
            appPrms->txDataSent = FALSE;

            GPIO_pinWriteHigh(CONFIG_GPIO_PULSE_BASE_ADDR, CONFIG_GPIO_PULSE_PIN);
            GPIO_pinWriteHigh(CONFIG_GPIO_PULSE_BASE_ADDR, CONFIG_GPIO_PULSE_PIN);
            GPIO_pinWriteHigh(CONFIG_GPIO_PULSE_BASE_ADDR, CONFIG_GPIO_PULSE_PIN);

            SemaphoreP_post(&appPrms->writeDoneSem);

            GPIO_pinWriteLow(CONFIG_GPIO_PULSE_BASE_ADDR, CONFIG_GPIO_PULSE_PIN);
            GPIO_pinWriteLow(CONFIG_GPIO_PULSE_BASE_ADDR, CONFIG_GPIO_PULSE_PIN);
            GPIO_pinWriteLow(CONFIG_GPIO_PULSE_BASE_ADDR, CONFIG_GPIO_PULSE_PIN);
        }
    }

    return;
}

Here is the point we all hoped to do the magic:

    /* Check if TX FIFO is empty */
    if(appPrms->txDataSent == TRUE)
    {
        intrType = UART_getIntr2Status(appPrms->baseAddr);
        if((intrType & UART_INTR2_TX_EMPTY) != 0U)
        {
            UART_intr2Disable(appPrms->baseAddr, UART_INTR2_TX_EMPTY);
            appPrms->txDataSent = FALSE;

            GPIO_pinWriteHigh(CONFIG_GPIO_PULSE_BASE_ADDR, CONFIG_GPIO_PULSE_PIN);

            SemaphoreP_post(&appPrms->writeDoneSem);

            GPIO_pinWriteLow(CONFIG_GPIO_PULSE_BASE_ADDR, CONFIG_GPIO_PULSE_PIN);
        }
    }

And this is what happened

Best regards,

ms