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TMS570LS3137: MibSPI RAM Parity Disables

manzoor iftequar
Prodigy 95 points

Part Number: TMS570LS3137

I noticed that MibSPI modules behave differently than other peripherals in TMS570LS3137. When you first enable parity check and then clear the RAM, for some reason clearing the RAM disables parity check.

Currently we are reenabling RAM parity check after MibSPI RAM memory Init.

Can you please let me know if that is expected because I didn't find anything about this behavior in TMS documentation. 

  • 0
    TI__Guru 74556 points

    Hi Manzoor,

    Can you please provide more details on this 

    like which exact bit you are enabling for parity and in exact which register you are enabling?

    And what changes you observed after mem_init function? Is that previously enabled bit clearing?

    --

    Thanks & Regards,

    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 95 points

    Here is how my code

    #define ENABLE_PARITY 0x0AU


    ........
    spiReg[i]->UERRCTRL = ENABLE_PARITY; /* Enable SPI RAM parity */
    uPSystem_memoryInit(MibSPI_RAM[i]);
    spiReg[i]->ENA = 1U; /* Ebable SPI */
    ........

    ..

    #define MEM_INIT_ACTV 0x0A
    #define MEM_INIT_INACTV 0x05
    #define MEM_INIT_DONE_BIT 8U

    void uPSystem_memoryInit(UINT32 MemModules)
    {
    /* Enable global memory hardware initialization */
    systemREG1->MINITGCR = MEM_INIT_ACTV;

    /* Select memory modules to initialize */
    systemREG1->MSINENA = MemModules;

    /* Wait until initialization is completed */
    while (!GetBit(systemREG1->MSTCGSTAT, MEM_INIT_DONE_BIT))
    {
    /* Do nothing */
    }

    /* Disable global memory hardware initialization */
    systemREG1->MINITGCR = MEM_INIT_INACTV;


    Initialy value of UERRCTRL register is 0x05 then we are setting it to 0x0A but after the uPSystem_memoryInit function call UERRCTRL is resetting back to 0x05

  • 0 in reply to manzoor iftequar
    TI__Guru 74556 points

    Hi Manzoor,

    You are right about this, i mean the parity enable is disabling after memory initialization for MibSPI. And as you said, it is not happening for other peripherals. I did test for DCAN, ADC and N2HET and this is not happening there.

    The root cause was not identified for this behavior, let me discuss with internal team on this and i will get back to you soon.

    Please expect some delay in response.

    --

    Thanks & Regards,
    Jagadish.