TMS570 NHET ECMP MOV32 instruction

Hi Fumin,

To explain this - let's use the analogy of a hardware based timer.

The CNT instruction would correspond to the time-base counter.

The ECMP instruction corresponds to the compare register and an "==" comparator.

The MOV32 instruction corresponds to a shadow register behind the ECMP.

Ok, so let's tackle the question of the missing pulse first.   Using the analogy of the hardware timer, if you were to write directly to the compare register while the counter is counting (and bypass the shadow register) since the compare is "==" you might cause the timer to miss the comparison for the current counter period.   For example, let's say the counter counts from 0 to 100 and then resets back to 0;  and the compare is initially set to trigger on a value of 75.     Now if the counter is allowed to count all the way to 60, and then you write directly the value of 50 into the compare register, you will miss the compare event for that counter period.   The counter will have to count all the way up to 100, then reset to 0 and count up to 50 again to reach a point where the new compare value triggers.

Ok, now let's consider the use of the MOV32 as a 'shadow register';  with the same counter example.   This time though, instead of writing the new value of 50 to the compare register directly (the ECMP) the program writes this to the MOV32 instruction.   The MOV32 instruction will hold the value of 50 in it's data field, but the ECMP instruction still has the value of 75 in it.   Now the counter counts 60, 61, 62 ... 75 and the ECMP still triggers, because it's still looking for the value 75.

When the counter continues to count, reaches 100, and resets to 0, then the MOV32 instruction can be conditionally executed on the event of Zero condition out of the CNT instruction.   The MOV32 execution updates the ECMP field to a value of 50, but at a safe time (at the start of the next counter period).    This is what a hardware shadow register would do.

The simple program above would go something like this:

L0   CNT { comp=EQ,reg=T,max=100,data=0};

L1   MOV32 { remote=L2,z_cond=ON,type=IMTOREG&REM,reg=NONE,data=50};

L2   ECMP { next=0,hr_lr=LOW,control=ON,en_pin_action=ON,pin=0,action=PULSEHI,reg=T,data=75};

And attached is a screenshot where you can see how this executes in the NHET Simulator.  

Note that the first two periods for which this program executed the duty cycle was 50% (you can see this in watch_out[31:0] where bit 0 changes 50% of the way through the period;  period is marked by het.z_flag = 1 points.   Then I edited in the memory window the data field of L1 to simulate the CPU writing to this instruction field, and you can see the next two periods have a much higher duty cycle.  (I wrote value of 16 which is where the compare will match and the pin will be set, so duty cycle is 85/101 = ~84.15%).

(Sorry - You probably  need to zoom very  big in your web browser to see this, but it is a .jpg and it should stay clear as you zoom in.)