Dear Champs,
Could you please let me know where I can find the clock tree for ePWM module?
I found 200Mhz SYS_CLK used for ePWM instance from below e2e, but I could not find it in TRM.
| Also note that the CONTROLSS uses a shared 200MHz SYS_CLK for each EPWM instance. |
When I checked 6.4.1 Overview and 6.4.3.4 Clock Selection, I found DPLL_CORE_HSDIV0_CLKOUT2 was used for ControlSS PLL_CLK, but could not find how this 400Mhz can be 200Mhz SYS_CLK.
Could you please clarify this which clock was used for ePWM module and how it can be 200Mhz?
Is this DPLL_CORE_HSDIV0_CLKOUT2 divided by 'CONTROLSS_PLL_CLK_DIV_VAL' in ControlSS?
Thanks and Best Regards,
SI.