AM2434: Support SMP FreerRTOS on AM2434?

Bruce(Shanghai) Liu

Intellectual 1010 points

Part Number: AM2434

Hi team,

Do we have any plan to realize SMP FreerRTOS on AM2434? Thanks!

over 2 years ago

0 Kowshik Gudimetla over 2 years ago

TI__Genius 15435 points

Hi bruce,

Our expert is currently OOO, please expect some delay until the secondary owner replies.

Thanks

0 Aakash Kedia over 2 years ago in reply to Kowshik Gudimetla

TI__Mastermind 26145 points

Hi Bruce(Shanghai) Liu,

Let me get back to you on this. We are looking into more details like feasibility and support on the same. Let us come back to you on the same.

Best Regards,
Aakash

0 christophe vieville over 2 years ago

Prodigy 111 points

HI All,

I am also interesting about SMP support on the AM243x. do you have a plan about this ?

0 Aakash Kedia over 2 years ago in reply to christophe vieville

TI__Mastermind 26145 points

Hi christophe vieville,

Our research and internal discussion is still ongoing. Please be patient.

Best Regards,
Aakash

0 Aakash Kedia over 2 years ago in reply to Aakash Kedia

TI__Mastermind 26145 points

Hi Bruce(Shanghai) Liu and christophe vieville,

Apologies for the delay.

Dual Cortex R5 subsystem cannot support SMP as cores do not have unified view of memory. Hence, due to lack of HW cache coherency support, we do not expect SMP implementation to yield reasonable performance across different use cases and not going to support this in SDK.

You may choose to evaluate your own and explore options like core affinity based optimizations depending on use case.

Hope this helps.

Best Regards,
Aakash

0 wang bin over 2 years ago in reply to Aakash Kedia

Prodigy 245 points

Hi Aakash Kedia,

Our custom board use four networking ports on Icssg0 and icssg1 in dual mac mode. I am evaluating our software design:four ports network processing on one Cortex R5 core or add another Cortex R5 core , use smp mode on two Cortex R5 cores , That's why I wang to ask this question. I test on our custom board ,when porting 4 ways networking ports on one core such as R5_0_0, and run a udp stress test on selected two ports, the fuction print_cpu_load used on sdk example is print 'CPU load = 100. 0 %'.

can you give some suggestions or hints to resolve this issue on our use case? Thank you.

0 Aakash Kedia over 2 years ago in reply to wang bin

TI__Mastermind 26145 points

Hi Wang,

If you have this example which is functional on TI-EVM then you can share the same with Bruce and we can analyze the same.

In our opinion, SMP will not help you optimize the CPU load but just the Throughput achieved. Even though if you intend to explore this, you can try the same by disabling the caches.

We can find better options instead of SMP, if you can share more information with us.

Best Regards,
Aakash

0 wang bin over 2 years ago in reply to Aakash Kedia

Prodigy 245 points

Hi Aakash Kedia,

I'm glad to hear that. I will send my code through email. thank you.

0 Aakash Kedia over 2 years ago in reply to wang bin

TI__Mastermind 26145 points

Hi Wang,

We are looking into this. We will get back to you on this by the end of next week.

Best Regards,
Aakash

0 wang bin over 2 years ago in reply to Aakash Kedia

Prodigy 245 points

Hi Aakash Kedia,

Is my issue resolved as I have sent email to you .

0 Nilabh Anand over 2 years ago in reply to wang bin

TI__Mastermind 45654 points

Hi Wang,

After discussion from internal team , please find our analysis below:

1. 4 port support on ICSSG using Enet driver is not supported by SDK yet.

2. SMP support cannot be supported. The AM243x R5 subsystem can’t support SMP due to architectural limitations. Hence, SW can’t support it.

3. MCU SDK 8.6 will have dual mac feature for ICSSG, but enabling four ports using one R5F is not something that we have scoped in SDK.

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AM2434: Support SMP FreerRTOS on AM2434?