AM2634: Problem with external flash

Hi Benjamin Dollinger

Can you go through the following documentation of integrating the custom flash support -- https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/08_05_00_24/exports/docs/api_guide_am263x/CUSTOM_FLASH_SUPPORT_GUIDE.html

Feel free to reach out to us if you are still stuck at this.

Best Regards,
Aakash

Hi Aakash,

I tried it with the qspi_flash_diag_am263x-cc_r5fss0-0_nortos_ti-arm-clang project and the newes SDK, but I suck on the same error:

[Cortex_R5_0] ASSERT: 0.3s: soc/am263x/soc_rcm.c:SOC_rcmGetCoreFout:1521: FOut != 0 failed !!!

Any further suggestions ?

Regards,

Benjamin 

Hi Aakash,

I tried it with the qspi_flash_diag_am263x-cc_r5fss0-0_nortos_ti-arm-clang project and the newes SDK, but I suck on the same error:

[Cortex_R5_0] ASSERT: 0.3s: soc/am263x/soc_rcm.c:SOC_rcmGetCoreFout:1521: FOut != 0 failed !!!

Any further suggestions ?

Regards,

Benjamin 

Hi Benjamin Dollinger,

Seems like there are some changes in the application done by you (majorly regarding the clock configurations). Can you share the entire project folder so that we can check the problem in the same ?

Best Regards,
Aakash

Hi Aakah,

I just use the SDK examples without any changes.

It looks for me like an issue of the SDK, cause on older SDKs I have this issue just for the qspi_flash_diag example but with the 08.05.00.24 version I've got it also for the hello_worl example. 

Best Regards,

Benjamin 

Hi Benjamin Dollinger,

Which boot mode are you using ? My suggestion would be to use (1101 or Dev Boot Mode) to test the qspi_flash_diag.

Best Regards,
Aakash

Hi Aakash,

actually we use on our board fix 0010, but I tried meanwhile every Boot Mode and no one works.  

Can my someone explain what this functions query, cause it raises always this debug assert ?  

pllSwitchFlag = SOC_rcmExtract8 (ptrTopRCMRegs->PLL_CORE_STATUS, 10U, 10U);

    if (pllSwitchFlag)

    {

        uint32_t M, N, M2, FracM;

        N  = CSL_FEXT(ptrTopRCMRegs->PLL_CORE_M2NDIV, TOP_RCM_PLL_CORE_M2NDIV_N);

        M2 = CSL_FEXT(ptrTopRCMRegs->PLL_CORE_M2NDIV, TOP_RCM_PLL_CORE_M2NDIV_M2);

        M  = CSL_FEXT(ptrTopRCMRegs->PLL_CORE_MN2DIV, TOP_RCM_PLL_CORE_MN2DIV_M);

        FracM = CSL_FEXT(ptrTopRCMRegs->PLL_CORE_FRACDIV,TOP_RCM_PLL_CORE_FRACDIV_FRACTIONALM);

        FOut = SOC_rcmADPLLJGetFOut(Finp, N, M, M2, FracM,div2flag);

        DebugP_assert(FOut != 0);

    }

And also, what is the different between the old end the new SDK, cause with the old, at least the “hello world” works always fine.

Best Regards,

Benjamin 

Hi Benjamin Dollinger,

I am not able to get a grasp of your system. Your device has a fixed 0010 mode. Now you try to run the qspi-diag and it fails ?

Flash Diagnostics uses QSPI controller at 1-1-1 mode whereas due to boot mode as 0010 the ROM configures the flash at 1-1-4 mode. Some flashes when moving from higher protocol to lower protocol, their support is not feasible. So it is recommended to reset the flash between the same. That is why my suggestion was to use 1101 which is Dev Boot Mode. In this device is booted with no flash configuration settings, so its easier to test.

I am still not able to understand the difference in your system. Are you suggesting that it was functional on older SDKs ?

Best Regards,
Aakash

Hi Aakash,

thanks for your reply.

You were right, in the Dev Boot Mode I can flash also with the new SDK.

But I'm still struggling with the "qspi_flash_diag" example. 

The example works fine, till the "Write-Read Test", but in the QSPI_writeConfigMode() funktion I get following error:

Cortex_R5_0: Can't Run Target CPU: (Error -2134 @ 0x0) Unable to control device execution state. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.10.0.00080)
Cortex_R5_0: Trouble Reading Memory Block at 0x70041dc5 on Page 0 of Length 0x1: (Error -1205 @ 0x70041DC4) Device memory bus has an error and may be hung. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.10.0.00080)
Cortex_R5_0: Trouble Reading Memory Block at 0x70041dc5 on Page 0 of Length 0x1: (Error -1205 @ 0x70041DC4) Device memory bus has an error and may be hung. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.10.0.00080)

...

I use this NOR flash: IS25LP032D-JBLA3

Best Regards,

Benjamin 

Hi Aakash,

I'm not shure, if you understand me correctly.

I can flash the qspi_flash_diag example into the RAM, but when I start it, it only comes up to "write-ride" test. 

And after that, following error appears.

Regards,

Benjamin 

Hi Benjamin Dollinger,

Let's have a call to discuss the same. Please send an invite at a-kedia@ti.com. Please make sure to send an invite to your point of contact in TI as well.

Best Regards,
Aakash