Hello,
I'm using a TMS570LS20216SPGE on the TMDX570LS20SUSB development stick. I am attempting to configure an A/DC and a DMA channel to work together to store a continuous A/D sample stream into a RAM circular buffer without core intervention.
I have set up one A/DC group to run in continuous mode to capture data from 1 A/D channel. I have allocated all 64 FIFO words to this group, and have configured the group for multi-word DMA transfer mode (i.e., EV_BLK_XFER=1 with EVBLOCKS=16).
I have configured DMA channel 0 (I am only using 1 DMA channel at this point) to service HW requests from the A/D. I have set the control packet for this channel to the following:
CHCTRL.TTYPE=0 (frame trigger)
CHCTRL.AIM=1 (auto-initiation enabled)
ITCOUNT.IETCOUNT=16 (frame is 16 words, same as A/DC0 EVBLOCKS)
ITCOUNT.IFTCOUNT=64 (64 frames per block)
ISADDR=ADC FIFO
IDADDR=base of RAM circular buffer
As I understand it, these configurations should cause the ADC to request a DMA transfer each time 16 conversion results have been completely written to the FIFO. On each DMA request from the A/D, the DMA engine should transfer 1 frame (16 words) from the A/DC FIFO into RAM. After 64 frames have been completed (i.e., a DMA block), the active destination address of the DMA channel should be reset to the initial control packet value (IDADDR) thus implementing a (16*64=) 1024-sample circular buffer.
This scheme seems to work fine for several iterations (around 24 DMA blocks), however I soon observe words in the RAM buffer of the form 0x80000xxx (i.e., and A/DC sample with EV_EMPTY=1) which indicate that the DMA is reading an empty FIFO.
Can anyone spot an error with my configuration that would cause the DMA engine to attempt to read from an empty FIFO? Any help is much appreciated.
Thanks,
Jason
