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TMS570LC4357: ADC Maximum Sampling Window

Part Number: TMS570LC4357

Hi,

At datasheet SPNU563A–March 2018 at 22.2.1.3 it says:

And then again in the registers explanation:

From my understanding the maximum number of clock cycles would be 4097 and not 4098. 

Is there an error there or I misunderstood anything?

Thanks in advance for any help :).