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AM2432: I2C timing modification to talk to Lattice XO3 FPGA

Part Number: AM2432

My design connects a Lattice XO3LF_6900C FPGA I2C interface to the AM2432.

The FPGA does not acknowledge the I2C address when using the I2C configuration and driver from MCU_PLUS_SDK_AM243x_08_05_00_24. However with an Aardvark device, I do get proper access. The difference is a delay after the start condition (see pictures below).

Is there any way to configure such delay?

AM2432 I2C write commandAardvark I2C write ID read command

  • Hi Reto,

    It's difficult for me to see the details in your scope shots. Can you please send separate "zoomed in" scope shots?

    Thanks and regards,
    Frank

  • CPU access picture above zoomed in.

    Aardvark first Byte zoomed in.

    If I knew what you are looking for, I can measure it out. The accepted resolution  320x240 on this thread is limited.

  • Hi Reto,

    Ok, I see the Aardvark inserts delay between the I2C START condition and the first data bit.

    I browsed through the AM243x TRM I2C chapter and the MCU+SDK I2C driver API. I can't find a feature which allows inserting a delay between the START condition and the first data bit.

    Have you tried slowing down the I2C clock frequency?

    Is it possible to configure the FPGA to not expect this delay?

    I'm looping in an I2C hardware expert for further comment.

    Regards,
    Frank

  • Hi Frank,

    I have slowed down the I2C to 100kHz, without any success. The issue is visible when the FPGA is not programmed. => I do not have any influence what the FPGA expects, since it is the hardened internals in such a case.

    In the meantime I have built a bit bang routine with the delay. It runs at about 250kHz. For my current purpose it works.