Part Number: TMS570LC4357
Hi team,
Here's an issue from the customer may need your help:
When debugging the EMAC module, it is found that RXERRCODE = 2 (ownership bit not set in SOP buffer) in the MACSTATUS register after the first response to a receive interrupt.
According to the description of ownership in the manual, the ownership is set by the EMAC module right? What could be the possible causes of this issue?

Could you help check this case? Thanks.
Best Regards,
Cherry