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RM46L850: EMAC: TX completion pointer in case of transmit error

Part Number: RM46L850


Hi,

I'm working with the Hercules RM46 dev board and intend to use the TMS570 on our custom board.

I'm focusing on the EMAC driver right now and I'm wondering something.

In the TRM it is written (31.2.17.1.1): "the EMAC issues an interrupt to the CPU when it writes the packet’s last buffer descriptor address to the appropriate channel queue’s transmit completion pointer located in the state RAM block"

But is the completion pointer also updated in the case transmission was abandoned because of collision or carrier sense error (or other if I missed them).

If it's the case, it's okay.

However, if it's not, that might mean that the tail of BD is never reached (in case error occurs for that tail) and that I have no way to provide new packets/BDs to the EMAC again.

Could you clarify it please?

Since I'm talking about errors, I also wanted to be sure that I understood it well:

Errors can be checked only through STAT registers/interrupts. And it’s not clear when STAT is updated. I conclude it is simply not meant to be used for error checking.

Could you confirm that I'm right?

Thanks in advance,

Laurent

  • Hi Laurent,

    Started working on your issue and we will provide an update soon.

    --

    Thanks & regards,
    Jagadish.

  • Hi Laurent,

    Apologies for the delay.

    However, if it's not, that might mean that the tail of BD is never reached (in case error occurs for that tail) and that I have no way to provide new packets/BDs to the EMAC again.

    If no collision occurred, in that case the EMAC generates interrupt to the CPU after it writes last buffer descriptor address to the transmit completion pointer. once the transmit completion pointer updated with last buffer descriptor address, then EMAC gives the interrupt to the CPU. Now the CPU can give a new packet to the header descriptor pointer.

    If any collision occurred(i.e. any energy detected on the cable), in that case EMAC won't generate any interrupt, instead of it will again try to transmit the same packet until the cable free of energy and packets gets transmitted. Once the cable free and EMAC writes its last buffer descriptor address to the completion pointer then it will generate interrupt to the CPU. Now CPU can give new packet to the header descriptor pointer.

    Errors can be checked only through STAT registers/interrupts. And it’s not clear when STAT is updated. I conclude it is simply not meant to be used for error checking.

    If any error packets received with errors like Code, CRC and Alignment then those packets will get discarded automatically by EMAC unless we enabled RXCEFEN bit. If this bit is enabled, then we should monitor the corresponding flags in the receive descriptor to make sure whether these errors are present or not.

    --

    Thanks & regards,
    Jagadish.

  • Hi Jagadish,

    Thanks for the reply.

    Regarding the first point, I meant when the transmission is abandoned. This can happen according to datasheet statistics registers:

    Regarding the second point, I was referring to Tx. I originally wanted to check if the transmission of my packet was successful. I wanted to check errors in STAT interrupt by setting the stat register value to 0x7FFFFFFF so that after the first error I get the interrupt. But it's not clear when will happen this interrupt.

    Hence my question is: is STAT interrupt meant to be used for (Tx) error checking?

    Best regards,

    Laurent

  • Hi Laurent,

    Apologies for the delay.

    Hence my question is: is STAT interrupt meant to be used for (Tx) error checking?

    Yes, you can use it for Tx error checking.

    Actually, this statistics interrupt will get generated whenever the any statistics value greater than or equal to the 0x8000 0000. So, if you want you can write Tx statistics with 0x7FFF FFFF so that whenever next Tx error happens you will get statistics interrupt.

    --

    Thanks & regards,
    Jagadish.

  • Hi Jagadish,

    Thanks for the reply but I still don't know when the STAT interrupt is triggered. To which packet does it correspond?

    And also, I wish you could reply to the first question: is the completion pointer also updated in the case transmission was abandoned (because of collision or carrier sense error or other)? In other words, will I get an interrupt for the packet that was abandoned?

    Sorry to insist but I really need this answer. If you don't know maybe someone else can help.

    Regards,
    Laurent

  • Hi Laurent,

    Thanks for the reply but I still don't know when the STAT interrupt is triggered. To which packet does it correspond?

    It is simple, we have different stats registers right.

    once you enable this interrupt, then this interrupt will get trigger when any one of the static registers value greater than or equal to the 0x8000 0000.. If all the register values are less than 0x8000 0000 value, then no interrupt will get trigger. 

    In other words, will I get an interrupt for the packet that was abandoned?

    No, you won't get any interrupt in the case of collision. Instead of it will again try to transmit the same packet until the cable free of energy and packets gets transmitted.

    --

    Thanks & regards,
    Jagadish.

  • Hi,

    I'm sorry to insist but this still doesn't answer my question. The question is:

    Will I get a Tx interrupt in the case transmission was abandoned?

    You keep saying it will still be transmitted but in the datasheet it is clearly written that it CAN be abandoned in some cases (please see the pictures from previous messages).

    Regards,

    Laurebt

  • For the sake of free documentation, please find hereunder my conclusion:

    I finally decided to try it on HW. I'm using a custom TMS570 board.

    I proceed like this:

    • Send a bunch of packets successfully.
    • Unplug the cable
    • Fake the SW and make it believe it can send packets (even if no link)
    • Add breakpoint in the ISR
    • Send the packets (that is writing TxHDP with BD list containing data to send)
    • Verify that breakpoint is reached.

    Result: it is reached, then ISR is called even if the transmission is abandoned.

    NB: EMAC cannot send the packet and hence abandoned because it feels that there is no other node on the bus (this is - what I believe is - carrier sense error)

    Hope this will help someone,

    Best regards,
    Laurent

  • Hi Laurent,

    Good to hear that you solved the issue and thanks for your detailed explanation.

    --

    Thanks & regards,
    Jagadish.