TMS570LS1227: ESM Low Interrupt Timing issue

Jacob Byers

Part Number: TMS570LS1227
Other Parts Discussed in Thread: HALCOGEN

Hello,

I'm working on a project, and have some interrupts enabled (SCI and SCI2 enabled using the IRQ, RTI CompareX enabled using FIQ). I'm working on adding an ESM Low interrupt handler for the ADC parity errors, but am finding some puzzling behavior. The RTI is used to set flags for function execution in the main loop, whose timing is very reliable until I enable the ESM Low Interrupt handler in the VIM. Once I enable this, it seems to break the normal execution scheme.

The function using the ADC typically executes in ~70 uSec, 40 or so of which is indicated by HalCoGen as the Sample and Conversion time for the channels being used. Once the ESM Low Interrupt is enabled, that execution time balloons to greater than 1 ms.

Other timing sees similar alteration. It seems as though the RTI interrupt itself, executed in the FIQ, is taking considerably longer to execute.

While I believe I've isolated the configuration change to the enabling of the ESM Low Interrupt, I've enabled it on the parent codebase (whose RTI interrupt lies in the IRQ, but doesn't have many of the startup tests enabled) without a similar change in timing.

Any ideas as to why this is occurring? I don't see any mention in the TRM of using the ESM low interrupt and it's impact on timing in the system, and from my understanding it seems unusual that enabling the ESM Low interrupt in the IRQ would have any impact on the execution of the RTI in the FIQ

over 2 years ago

0 QJ Wang over 2 years ago

TI__Guru**** 197306 points

Hi Jacob,

Jacob Byers said:
Once the ESM Low Interrupt is enabled, that execution time balloons to greater than 1 ms.

If the parity checking is enabled and ESM Low is enabled , it will take longer time to read the results if there is any parity error.

0 Jacob Byers over 2 years ago in reply to QJ Wang

Prodigy 30 points

Thanks for the reply.

To ensure my implementation works, I have a test build that occasionally injects a parity error by enabling the TEST bit in the Parity control register. While I can confirm that parity errors are occasionally happening (as I am directly causing them), doing some basic timing analysis via gpio toggling shows the execution time consistently taking the above time (~1.2 ms), without regard to the presence of a parity error.

For the time being, I've found that disabling the ESM Low Interrupt and manually polling the ESM Group 1 Status register after a read accomplishes the same goal, while retaining the needed timing elsewhere in the system.

0 QJ Wang over 2 years ago in reply to Jacob Byers

TI__Guru**** 197306 points

I did similar test, and didn't see the issue. Enabling ESM LOW interrupt doesn't impact on the execution of RTI and ADC:

0 QJ Wang over 2 years ago in reply to QJ Wang

TI__Guru**** 197306 points

This is my the main() I used for the test:

1. RTI: compare 0 interrupt is enabled, the compare 0 period is 100us (GIOB.1 toggle)

2. ESM Low Interrupt is enable or disabled (VIM channel 20), and ESM Group1 channel 19

3. ADC sampling is triggered by GIOB.0 rising edge

Fullscreen 0434.sys_main.c Download

/** @file sys_main.c 
*   @brief Application main file
*   @date 11-Dec-2018
*   @version 04.07.01
*
*   This file contains an empty main function,
*   which can be used for the application.
*/

/* 
* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com 
* 
* 
*  Redistribution and use in source and binary forms, with or without 
*  modification, are permitted provided that the following conditions 
*  are met:
*
*    Redistributions of source code must retain the above copyright 
*    notice, this list of conditions and the following disclaimer.
*
*    Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the 
*    documentation and/or other materials provided with the   
*    distribution.
*
*    Neither the name of Texas Instruments Incorporated nor the names of
*    its contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/


/* USER CODE BEGIN (0) */
/* USER CODE END */

/* Include Files */

#include "sys_common.h"

/* USER CODE BEGIN (1) */
#include "esm.h"
#include "adc.h"
#include "sci.h"
#include "gio.h"
#include "rti.h"
#include "sys_vim.h"

adcData_t adc_data[2];
/* USER CODE END */

/** @fn void main(void)
*   @brief Application main function
*   @note This function is empty by default.
*
*   This function is called after startup.
*   The user can use this function to implement the application.
*/

/* USER CODE BEGIN (2) */
void wait(uint32 time);

/* USER CODE END */

int main(void)
{
/* USER CODE BEGIN (3) */
    uint32 value = 0;

    /* initialize gio     */
    gioInit();
    gioSetDirection(gioPORTB, 0xF);

    /* initialize sci/sci-lin  : even parity , 2 stop bits */
    sciInit();
    rtiInit();
    esmInit();

    /** - Enable interrupts */
    esmREG->IESR1 = (uint32)((uint32)1U << 19U); //enable ADC1 Parity ESM interrupt
    /* enable interrupts */
    vimREG->REQMASKSET0 = (uint32)((uint32)1U << 20U); //Enable ESM LOW VIN interrupt

    vimREG->REQMASKCLR0 = (uint32)((uint32)1U << 20U); //Disable ESM LOW VIN interrupt

    /* initialize ADC  */
    /* Group1 -> Channel 0 and 1                        */
    /* HW trigger trigger source as GIOB  Pin 0         */
    adcInit();

    /* Enable RTI Compare 0 interrupt notification */
    rtiEnableNotification(rtiNOTIFICATION_COMPARE0);


    _enable_IRQ();

    /* Start RTI Counter Block 0 */
    rtiStartCounter(rtiCOUNTER_BLOCK0);

    adcREG1->PARCR = 0x0000000AU;  //Enable ADC RAM parity check

    /* start adc conversion */
    adcStartConversion(adcREG1, adcGROUP1);

    while(1) /* ... continue forever */
    {
        /* trigger using gio port b, pin 0  */
        gioSetBit(gioPORTB, 0, 1);

        /* ... wait and read the conversion count */
        while((adcIsConversionComplete(adcREG1,adcGROUP1))==0);
        value = *(unsigned int*) 0xFF3E0058;
        value = *(unsigned int*) 0xFF3E005c;
        value = *(unsigned int*) 0xFF3E0060;
        value = *(unsigned int*) 0xFF3E0064;
        value = *(unsigned int*) 0xFF3E0068;
        value = *(unsigned int*) 0xFF3E006c;
        value = *(unsigned int*) 0xFF3E0070;
        value = *(unsigned int*) 0xFF3E0074;

        gioSetBit(gioPORTB, 0, 0);
        wait(0xFFF);
    };
/* USER CODE END */

    return 0;
}


/* USER CODE BEGIN (4) */
void rtiNotification(uint32 notification)
{
/*  enter user code between the USER CODE BEGIN and USER CODE END. */
    /* Toggle HET pin 0 */
    gioToggleBit(gioPORTB, 1);
}

void wait(uint32 time)
{
    while(time){time--;};
}
/* USER CODE END */

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TMS570LS1227: ESM Low Interrupt Timing issue