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MSP432E411Y: Power supply hookup and unused Ethernet

Part Number: MSP432E411Y

I am connecting up this part in my design.  We are not using Ethernet.  How shall I connect those pins on the part?

On the development board I see Vddc and its return Vss, but I cannot see where this supply comes from and how it is to be connected.

I am not using the A/D converter.  How shall Vdda be connected?

Lastly, I am not using hibernate nor the battery, how should those pins be connected for proper operation?

Thank you for your help.

  • Hi,

    I am connecting up this part in my design.  We are not using Ethernet.  How shall I connect those pins on the part?

      Please follow the Connections for Unused Pins in the datasheet. 

    On the development board I see Vddc and its return Vss, but I cannot see where this supply comes from and how it is to be connected.

    Vddc is 1.2V supply generated by the integrated LDO of the chip. 

    Refer to https://www.ti.com/lit/pdf/slaa770 for decoupling capacitors on VDD, VDDC and VSS. 

    I am not using the A/D converter.  How shall Vdda be connected?

    You can connect VDDA to ground if you are not using ADC. 

    Lastly, I am not using hibernate nor the battery, how should those pins be connected for proper operation?

    See above table. 

  • You can connect VDDA to ground if you are not using ADC. 

    Charles, table 4-3. Signal Descriptions in the MSP432E411Y datasheet contains the following description for VDDA:

    The positive supply for the analog circuits (for example, ADC and analog comparators). These are separated from VDD to minimize the electrical noise contained on VDD from affecting the analog functions. VDDA pins must be supplied with a voltage that meets the specification in Section 5.4, regardless of system implementation.

    And Section 5.4 in the datasheet lists the operating condition for VDDA as:

    Also, section 3.4.1 Microcontroller Power Supply of slaa770 contains:

    The microcontroller has analog power-on reset (POR) and power-OK (POK) circuits that release and assert when the VDDA power-supply rails reach specific thresholds.

    Where the above suggest VDDA should be connected to a nominal 3.3V supply even if the ADC isn't used.

  • Hi Chester,

      Thank you very much for correcting my mistake. I missed these notes. 

  • Thank you gents.  I missed the table.  I am connecting up Vdda to Vcc, but do I need to bother with decoupling?  My design is very tight on space.   This is an inherited design and I would love to steal the capacitors that were dedicated for that function for the digital rail.

    The prompt response from you folks was/is greatly appreciated.

    Clyde

  • Thank you gents.  I missed the table.  I am connecting up Vdda to Vcc, but do I need to bother with decoupling?  My design is very tight on space.   This is an inherited design and I would love to steal the capacitors that were dedicated for that function for the digital rail.

    The prompt response from you folks was/is greatly appreciated.

    Clyde

  • but do I need to bother with decoupling?  My design is very tight on space.   This is an inherited design and I would love to steal the capacitors that were dedicated for that function for the digital rail.

    You do not need a separate decoupling cap for VDDA if you are going to combine VDDA and VDD together. You need decoupling cap for stable power supply to the device. Please follow https://www.ti.com/lit/pdf/slaa770 as suggest for decoupling cap. 2uF to 22uF is the bulk cap for combined VDD and VDDA.