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AM2634-Q1: SDK8.05 Multicores Project Syscfg Question

Part Number: AM2634-Q1
Other Parts Discussed in Thread: AM2631, SYSCONFIG

Hi expert.

    Customer reports that they have question to use syscfg tool for multicores project. They import ipc_notify_echo_am263x-lp_system_freertos_nortos from SDK8.5 and would like to modify it to enable lockstep for R5FSS1-0 & R5FSS1-1. However, system.xml only shows one R5F0-0 in syscfg editor and project property shows the chip they are using is AM2631. They can't not change it. 

Is this normal?? or something wrong with syscfg?

 

Beside, if they want to add GPIO in R5F0-1, in TRM we say we have GPIO0,1,2,3. Each core has corresponding GPIO module.  But in syscfg,  we only have GPIO0 can use for all cores.

Can you please check? How to fix it? or something wrong in TRM?

Regards

Andre 

  • Hi Andre,

    The CCS system xml file is used as a group project which includes all the CCS projects for each R5F cores or M4F core. It does not have its own sysconfig file. Each CCS project has its own sysconfig file where all the resource used by this CCS project file are defined.

    The advantage to use the system project file is that you can build, load, debug all CCS projects at the same time. Also the system configure tool will check the potential pinmux conflicts among the CCS projects in the same system project.

    As of the GPIO, there are 4 GPIO instances for AM263x, each for one R5F core. Apparently, there is a bug in the sysconfig tool, because all four example.syscfg files in the IPC example are pointing to the GPIO0. I have filed a JIRA ticket for this issue: [MCUSDK-10166] AM263x: System Configure Tool only allow to use GPIO0 for all R5F cores - Texas Instruments JIRA (ti.com)

    Best regards,

    Ming

  • Ming,

       Question here are:

    1. How to assign project to each core if you only have one R5F there?

    Would you please show us no matter import from IPC or create from empty example, if you only have AM2631 option, how create multiple cores project ?

    Just for you reference, AM243x can show all cores in IPC demo project.

    2. for GPIO Question, since this is a syscfg tool issue, what is temporary workaround?

    Regards

    Andre

  • Hi Andre,

    Unfortunately, for some reasons, all the CCS projects including the system project are made based on the AM2631. That is why there only one R5F core. Also the core ID used in the system.xml is incorrect. It should be "Cortex_R5_0" instead of "MAIN_PULSAR_Cortex_R5_0_0" (It looks like a cut-n-paste error from AM243x). I filed JIRA ticket for this issue: MCUSDK-10167

    For the GPIO issue, since it is a syscinfig tool issue, there is no workaround right now.

    Best regards,

    Ming

  • Ming, 

        Will these two bug be fixed in SDK8.6?

    Regards

    Andre 

  • Hi Andre,

    The GPIO issue was caused by the sysconfig tool. The STDO team and the HW apps team need to work together to fix it. It has been scheduled for MCU+ SDK 09.00.00 (2Q23)

    The R5F core ID issue may be possible to be fixed in 08.06.00. By the way, who is the customer and are they in production stop situation?

    Best regards,

    Ming

  • Ming, 

       No production stop but impact customer to develop multicores project.

    Like my description, the customer would like to have lock-step feature on R5FSS1-0 and R5FSS1-1 and R5FSS0-0 and R5FSS0-1 for real-time control.

    Without this bug fix, it's really hard to start multicore project development.

    Regards

    Andre 

  • Hi Andre,

    As I said in my previous post, the R5F core ID issue may be possible to be fixed in 08.06.00. I will make sure this issue can be fixed as soon as possible.

    Best regards,

    Ming

  • Ming, 

        This issue still exists in SDK8.06.00.34. May I know when we plan to solve this problem?

    Regards

    Andre

  • Hi Andre,

    This issue is scheduled to be fixed in MCU+ SDK 9.0.0 (end of June 2023).

    Best regards,

    Ming

  • Ming,

        Please refer to capture from SDK9.0.0.35. This issue is not solved.

    Please check when can we solve this problem. Thanks

    Regards

    Andre

  • Hi Andre,

    Which CCS version are you using? according to the release notes, the CCS version for 09.00.00.0033 is 12.4.0:

    Best regards,

    Ming

  • Ming,

    The CCS version is 12.4.0 exactly. The problem is there.

  • Hi Andre,

    The issue is with the CCS version. I just tested the AM263x MCU+ SDK 08.06.00 and 08.05.00 with the CCS 12.1.0. They both worked OK:

    But the AM263x MCU+ SDK with CCS 12.4.0 still not working. I will update the JIRA ticket (MCUSDK-10167) accordingly.

    Best regards,

    Ming

  • Hi Andre,

    We figured it out. The issue was caused by the CSP for AM263x. You will need to update the CSP by following the instructions from the following link:

    Update the Sitara CSP to 1.2.4.AM263x MCU+ SDK: Download, Install and Setup CCS (ti.com) 

    Best regards,

    Ming

  • Ming,

        Multicore option can be shown after modify timestamp file. However, the project assigned to each core is empty.

    After we assigned project to each core manually, then build from system project. CCS will DO NOTHING. No binary or image will be generated.

    Issue is not solved correctly.

    <?xml version="1.0" encoding="UTF-8" standalone="no"?>
    <system>
        <project configuration="@match" id="project_0" name="ipc_rpmsg_echo_am263x-lp_r5fss0-0_freertos_ti-arm-clang"/>
        <core id="MAIN_PULSAR_Cortex_R5_0_0" project="project_0"/>
        <project configuration="@match" id="project_1" name="ipc_rpmsg_echo_am263x-lp_r5fss0-1_nortos_ti-arm-clang"/>
        <core id="MAIN_PULSAR_Cortex_R5_0_1" project="project_1"/>
        <project configuration="@match" id="project_2" name="ipc_rpmsg_echo_am263x-lp_r5fss1-0_nortos_ti-arm-clang"/>
        <core id="MAIN_PULSAR_Cortex_R5_1_0" project="project_2"/>
        <project configuration="@match" id="project_3" name="ipc_rpmsg_echo_am263x-lp_r5fss1-1_nortos_ti-arm-clang"/>
        <core id="MAIN_PULSAR_Cortex_R5_1_1" project="project_3"/>
        <preBuildSteps/>
        <postBuildSteps>
            <step command="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_system_ccs_bootimage_gen OUTNAME=ipc_rpmsg_echo_system PROFILE=${ConfigName} MCU_PLUS_SDK_PATH=${MCU_PLUS_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE}"/>
        </postBuildSteps>
        <project configuration="Debug" id="project_305409810" name="ipc_rpmsg_echo_am263x-lp_r5fss0-0_freertos_ti-arm-clang"/>
        <core id="Cortex_R5_0" project="project_305409810"/>
        <project configuration="Debug" id="project_867293982" name="ipc_rpmsg_echo_am263x-lp_r5fss0-1_nortos_ti-arm-clang"/>
        <core id="Cortex_R5_1" project="project_867293982"/>
        <project configuration="Debug" id="project_987854929" name="ipc_rpmsg_echo_am263x-lp_r5fss1-0_nortos_ti-arm-clang"/>
        <core id="Cortex_R5_2" project="project_987854929"/>
        <project configuration="Debug" id="project_1903731437" name="ipc_rpmsg_echo_am263x-lp_r5fss1-1_nortos_ti-arm-clang"/>
        <core id="Cortex_R5_3" project="project_1903731437"/>
    </system>
    

    I also attach the system.xml to compare the content before assign project to each core and after.

    <?xml version="1.0" encoding="UTF-8" standalone="no"?>
    <system>
        <project configuration="@match" id="project_0" name="ipc_rpmsg_echo_am263x-lp_r5fss0-0_freertos_ti-arm-clang">
        </project>
        <core id="MAIN_PULSAR_Cortex_R5_0_0" project="project_0"/>
        <project configuration="@match" id="project_1" name="ipc_rpmsg_echo_am263x-lp_r5fss0-1_nortos_ti-arm-clang">
        </project>
        <core id="MAIN_PULSAR_Cortex_R5_0_1" project="project_1"/>
        <project configuration="@match" id="project_2" name="ipc_rpmsg_echo_am263x-lp_r5fss1-0_nortos_ti-arm-clang">
        </project>
        <core id="MAIN_PULSAR_Cortex_R5_1_0" project="project_2"/>
        <project configuration="@match" id="project_3" name="ipc_rpmsg_echo_am263x-lp_r5fss1-1_nortos_ti-arm-clang">
        </project>
        <core id="MAIN_PULSAR_Cortex_R5_1_1" project="project_3"/>
    	<preBuildSteps>
    	</preBuildSteps>
        <postBuildSteps>
            <step command="$(MAKE) -C ${CCS_PROJECT_DIR} -f makefile_system_ccs_bootimage_gen OUTNAME=ipc_rpmsg_echo_system PROFILE=${ConfigName} MCU_PLUS_SDK_PATH=${MCU_PLUS_SDK_PATH} CG_TOOL_ROOT=${CG_TOOL_ROOT} CCS_INSTALL_DIR=${CCS_INSTALL_DIR} CCS_IDE_MODE=${CCS_IDE_MODE}"/>
        </postBuildSteps>
    
    </system>
    

    Regards

    Andre

  • Hi Andre,

    The issue has been fixed in MCU+ SDK for AM263x 09.00.00.0033. I imported the ipc_notify_echo_am263x-cc_system_freertos_nortos in CCS 12.4.0 with the CSP updated first). Here is the CCS window looks like:

    When I build the ipc_notify_echo_am263x-cc_system_freertos_nortos, all 4 sub projects build automatically.

    Best regards,

    Ming