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TMS570LC4357: TMS570LC4357: Write to SPI flash using DMA Clarification regarding DMA control packet updates without disabling DMA controller

Part Number: TMS570LC4357

Hello,

We need to write data to an SPI flash using DMA. The DMA is also used by several other SPI peripherals like an ADC.

We need to update the DMA control packet to configure the source address and element count for each transfer for SPI flash data write.

We would also like to maintain DMA enabled while updating the control packet, as other SPI peripherals are running(specially, we need a continuous ADC acquisition while writing to flash)

According to TRM (SPNU563A), p. 724, table 20-9, in the description of the DMA_EN bit, I understand that the control packet should be set before enabling the DMA controller.

This would force us to disable DMA before configuring the control packet.

We would like to find a way to update the control packet without disabling DMA, if is possible.

Could you tell use which conditions shall be fulfilled to update a DMA control packet while DMA is still enabled?

I was thinking about to ensure first that DMA was not busy (MA_REG_BASE_ADDR->GCTRL & MASK_DMA_GCTRL_BUS_BUSY == 0), and then write the control packet (DMA_RAM_REG_BASE_ADDR->PCP[channel])

Would that work or shall we also check other conditions?

  • Hi Philippe,

    We started working on your issue and we will provide an update soon.

    --

    Thanks & regards,
    Jagadish.

  • Hi Philippe,

    If i understand correctly

    You connected two SPI slave devices i.e. ADC and Flash to the single instance of SPI master of the controller with two different chip selects right? Something like below

    If it is the case, how would you lost ADC data, anyway you have to disable the ADC slave CS and should need to enable the Flash chip to communicate with serial flash. And SPI slave it self can't send any data to the master until CS and clock are provided by master and master should send some dummy data to the slave to receive the data from slave device, so in this case if we disable the ADC chip select ADC cannot send any data until master finishes its communication with flash device right. After reenabling ADC chip select and providing clock only ADC acquisition data should receive by SPI master, If this is the scenario then there won't be any problem in disabling the DMA before reconfiguring the control packet.

    --

    Thanks & regards,
    Jagadish.

  • Hello Jagadish,

    Our flash and ADC are on 2 different buses.

    Currently, when we want to write to flash, we are disabling DMA before configuring a new DMA transfert and re-enabling DMA again.

    The only issue is that while we are configuring DMA transfer for flash writing, we are stopping ADC acquisition.
    You are right that last sample is not "lost" and still in ADC buffer, ready to be read our next SPI request.
    However, we need to make periodic samples at a high frequency, and we would like that flash writing has no impact on other operations, avoid to introduce sampling delays.

    So we would prefer to keep DMA enabled.
    We are interested to know if there are any solution that would allow to keep DMA running on other peripherals, while we are configuring a new packet to write to flash.


  • Hi Philippe,

    Apologies for delay in the reply, here in India we got consecutive holidays.

    Our flash and ADC are on 2 different buses.

    Okay understood.

    And i hope you are using different DMA channels for flash and ADC.

    If it is the case i will suggest below steps to reconfigure the control packet of channel without disabling entire DMA.

    1. First verify if there is any channel pending bit is set for the channel which you want to reconfigure.

    2. If channel pending bit was not set, then disable the trigger you are using for that channel (If you disable the trigger then no further channel transfers will occur)

    3. Now change the control packet as per your requirement without disabling DMA.

    4. Once you finished with altering control packet, now you can reenable the trigger.

    5. Once you reenabling channel, the communication should be normal again.

    --

    Thanks & regards,
    Jagadish.