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AM2634-Q1: SDL ATCM and BTCM demos problems

Part Number: AM2634-Q1

Hi team, 

I am integrating the demos of SDL_ECC_ATCM and SDL_ECC_BTCM into one project, and its functionalities not right, please help check. 

The project is attached: sdl_demos_integration_am263x-lp_r5fss1-0_nortos_ti-arm-clang.zip

Reminder: this project is running in R5FSS1-0. In this project, I closed the cache and when debugging, I do not open the 'variables', 'expressions' and memory browser. 

The questions are: 

1). the ECC init for ATCM and BTCM will change the data in the TCM. In the codes, I add two functions, one is vTcmInitialValueStore() used to store the initial value of ATCM/BTCM to two arrays; another one is TestTcmValueChange() used to detect the change of the TCM content. And firstly I insert the vTcmInitialValueStore() before ECC init and then insert TestTcmValueChange() after ECC init, and it shows that the contents are changed; 

2). Furtherly, I found that the 2-bit or 1-bit error inject will also change the data, you can check from the codes where I insert the vTcmInitialValueStore and TestTcmValueChange. 

3). Another strange thing is that the 2BitInjectTest or 1BitInjectTest sometimes can't pass, and the test stalls in the following loop: 

4). the ATCM and BTCM ECC features are enabled by R5 instructions, and should access to R5 registers to enable the ECC feature. However, the inject-error function, i.e. API- SDL_ECC_injectError, is by ECC aggregator, I am curious about it, why enabling the feature and injecting error are not through one similar path but through two different ways. 

Please check this question, I and customer are both very confused... the demos of SDL ECC are very unpredictable and very hard to debug. 

BR, 

Will 

  • To make this issue more clearly, I want to add some more founding here. 

    I modified the above project to following: sdl_demos_integration_am263x-lp_r5fss1-0_nortos_ti-arm-clang_sram.zip

    Please use this one. I added SRAM ECC demo into the project as well. 

    And I have following founding, please check in your side as well: 

    1). When do not enable the TCM ECC and event bus, that is the following codes: 

       The SRAM ECC test will not change the contents of ATCM/BTCM. 

    2). However, if add the codes as following, but not do the self-test of ATCM/BTCM ECC, 

       The SRAM ECC test will change the contents of ATCM/BTCM. 

    3). Furtherly, adding the codes that enable the event bus but not enable the ECC for ATCM/BTCM, 

       The SRAM ECC test will also change the contents of ATCM/BTCM. 

    4). And last, adding the codes that enable the event bus and also enable the ECC for ATCM/BTCM, and also do the self-test of ATCM/BTCM ECC, that is: 

      The SRAM ECC test and also the ATCM/BTCM self-test will change the contents of ATCM/BTCM. 

    Please BU side try the project above I shared, and give your comments. 

    Regards, 

    Will 

  • Hi Will,

    I will run the test in my end, then come back to you tomorrow morning

  • Hi QJ, 

    Thanks. And I also found that in 'SDL_UTILS_enable_event_bus' function, it will enable the ECC for TCM as well: 

    So that means ECC init for TCM can be removed...

    Best Regards, 

    Will 

  • Hi Will,

    As mentioned in the meeting and message, the ECC (TCM and SRAM) is not enabled by default. It have to be enabled before the memory init which generates ECC code for the memory content. If the ECC is not enabled, you will get corrupted data when reading the memory. I noticed that the memory in memory init function may not be correct in lockstep mode (ATCM is 0x4000, and BTCM is 0x2000).

    ECC init for TCM can be removed.

    Yes, you can remove the ECC enable function call in ECC init function.

    When running your project, the code gets stuck at: