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TMS570LS3137: Reduce power consumption

Carlos Penizzotto
Prodigy 50 points
Part Number: TMS570LS3137
Other Parts Discussed in Thread: HALCOGEN, RM48L540

Hello! My name is Carlos

I'm having trouble reducing the power consumption of the TMS570LS3137 microcontroller. I'm basing all my work in the Application Report of TI about this specific topic, named "Reduction of power consumtion for TMS570LS3137". (https://www.ti.com/lit/an/spna173/spna173.pdf?ts=1681316353136&ref_url=https%253A%252F%252Fwww.google.com%252F  )

I'm interested in the ability to power down the clocks of some peripherals. Let's say for example the DCAN1 module. To do this, the application report methodology suggests using the Peripheral Power-Down Set Register 1 (PSPWRDWNSET1), specifically setting the bits 0 and 1. In fact, the report says that the peripheral select number is PS8 (in table 5), with the asociated bits being Q[0,1], but if we search for the Peripheral Power-Down Set Register 1 (PSPWRDWNSET1)  in the refference manual we can confirm that we need to set bits 0 and 1 from this register.

The problem I'm having is that, when I try to set those bits (0 and 1) from the PSPWRDWNSET1 register, only the bit 0 responds and gets seted. Bit 1 does not. In fact, I also tried setting all 32 bits from that register, and again, only a few did respond. Reading that register after attempting to set all 32 bits gives the following answer:

01010000000100010000000100000101b

I know that the application report says that those bits that are not implemented will always read as 0, but in the case of the DCAN1 perihperal, I know that bit 1 should respond.  Also, I operate in privileged mode when I try to set those bits.

Can you help me realizing what am I doing wrong?

Thanks a lot in advance!

  • 0
    TI__Guru 69891 points

    Hi Carlos,

    We started working on your issue and will provide an update soon.

    --

    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    TI__Guru 69891 points

    Hi Carlos,

    After reading below thread i found some useful information

    (+) TMS570LC4357: Problems with DCAN shutdown by PCR - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

    If the CAN bus is active (a node is transmitting or has just finished transmission), the power-down request won't be taken and init bit of CAN control register won't be set.

    So, are you sure that your CAN bus idle while setting power down bit?

    --

    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 50 points

    Hi Jagadish!

    I see. I'm pretty sure that my CAN bus is idle while setting the power down bit. But this problem does not only happen with CAN, but with other peripherals as well.
    I forgot to mention that im using Free RTOS, so I thought that maybe that FreeRTOS did configure something that I wasn't totally aware of.

    To be sure that that was not the case, here is what I did:

    1)Created a new Compose Studio Code project with the TMS570LS3137 as target.
    2)Created a new HalCoGen project (associated with the CSS project) with NO RTOS, and disabled all available drivers of peripherals. I generated the code with those settings.
    3) The only thing that I added to the main function was to set all bits in the Peripheral Power-Down Set Register 1 (PSPWRDWNSET1) and Peripheral Power-Down Set Register 0 (PSPWRDWNSET0)

    After doing that, reading those registers while debuging  gave me the following results:

    PSPWRDWNSET1:  01010000000100010000000100000101b

    PSPWRDWNSET0:  00010011000000000000010101010001b

    I attach an image of the simple code I'm using.

    So, even going to the most basic configuration, the problem continues (a lot of bits are not set) :(  Surely there is something I'm missing! 
    I think if we solve this problem in such a basic configuration, the solution in more complex codes will be the same. Could you please replicate this basic scenario to see if you can help me?

    Thanks a lot!
    Carlos

  • 0 in reply to Carlos Penizzotto
    Prodigy 50 points

    Hi Jagadish!

    Just wanted to comment you that we recently tried with my partner on the RM48L540 microcontroller and we had the same problem Disappointed

    Surely there's something we are missing.


    We'll wait for your help whenever you can, thanks a lot!

    Regards.

  • 0 in reply to Carlos Penizzotto
    TI__Guru 69891 points

    Hi Carlos,

    Thanks for providing more details,

    I hung up with other issue so didn't get a chance to take a look at this issue, now i am working on it and i will provide an update as soon as possible.

    --

    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    TI__Guru 69891 points

    Hi Carlos,

    Just now i was able to create the project with the issue you mentioned. Let me debug further to give an update.

    --

    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 50 points

    Hi Jagadish!
    Ok!! Thanks a lot!

  • 0
    Prodigy 50 points

    Hi Jagadish!!

    Any news? I'm so stucked with this part of my project haha. Let me know anything you can figure out

    Thanks!!

  • 0 in reply to Carlos Penizzotto
    TI__Guru**** 196566 points

    The following are the ways that quadrants are used within a PS frame:
    a. The slave uses all the four quadrants.
    Only the bit corresponding to the quadrant 0 of PSn is implemented. It protects the whole 1K-byte frame. The remaining three bits are not implemented.
    b. The slave uses two quadrants.
    Each quadrant has to be in one of these groups: (Quad 0 and Quad 1) or (Quad 2 and Quad 3).
    For the group Quad0/Quad1, the bit quadrant 0 protects both quadrants 0 and 1. The bit quadrant 1 is not implemented.
    For the group Quad2/Quad3, the bit quadrant 2 protects both quadrants 2 and 3. The bit quadrant 3 is not implemented.

    DCAN1 takes bit[1:0]  (Quad 0 and Quad 1) of PSPWRDWNSET1, and DCAN2 takes bit[3:2]  (Quad 2 and Quad 3) of PSPWRDWNSET1. The Frame size is 512KB which uses 2 quadrants, so only bit 0 and bit 2 are set to power down DCAN1 and DCAN2.

    Bit 1 and bit 3 are not implemented. Writes to unimplemented bits have no effect and reads are 0.