This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TM4C1231H6PM: Hibernate TRIM Register.. TM4C1231H6PM & TM4C1291

Part Number: TM4C1231H6PM

Hi Team Tiva,

Customer question below for both the TM4C1231H6PM & the TM4C1291..

In The Hibernate example for the TM4C123_evk the following lines of code are present.

I didn’t see this noted in any Errata I read so am wondering if it should still be done (and if yes, what parts revs are affected) ?

Does this happen on the TM4C129 parts too ?

    //

    // Re-intializes the Trim which gets modified due to a known issue of

    // Hibernate register initialization from HIB#01 errata.

    //

    MAP_HibernateRTCTrimSet(0x7FFF);

Thanks, Merril

Ref: 

https://www.ti.com/product/TM4C1231H6PM

https://www.ti.com/lit/ds/symlink/tm4c1231h6pm.pdf

errata: https://www.ti.com/lit/er/spmz849f/spmz849f.pdf

  • Hi Merril,

    In The Hibernate example for the TM4C123_evk the following lines of code are present.

    I didn’t see this noted in any Errata I read so am wondering if it should still be done (and if yes, what parts revs are affected) ?

    The comment in the code is referring to HIB#01. See below conditions under which the errata can occur. HIBRTCT is the trim register which is mentioned as one of the affected registers. 

    //

        // Re-intializes the Trim which gets modified due to a known issue of

        // Hibernate register initialization from HIB#01 errata.

        //

        MAP_HibernateRTCTrimSet(0x7FFF);

    The default value of the trim register is 0x7FFF. However, due to the errata, the content of the register may not be correct. To work around the errata, the call of HibernateRTCTrimSet(0x7FFF) makes sure that the trim register has the correct value after RTC is enabled. 

    Does this happen on the TM4C129 parts too ?

    No, this does not affect TM4C129. The errata mentioned for TM4C123 is not shown in the TM4C129 errata document and neither the workaround is shown in the TM4C129 hibernate example. 

  • Hi Charles,

    Thx!  This issue does not seem to be in the current (errata: https://www.ti.com/lit/er/spmz849f/spmz849f.pdf ).. am I missing it?  Has it actually been fixed in latest TM4C123 silicon?  

    Thx, Merril

  • Hi Merril,

      It is shown in the errata. Please go to page 5. It is affecting both rev6 and 7. 

  • Sorry.. i guess I had my search term wrong.. :^/