AM2634: PLL Configuration in EB tresos

Hi Aswathy,

These configurations are already done in the Mcu driver code under the Mcu_Platform.c file. To enable this function, all you have to do is disable the "MCU_NO_PLL" option, it should be STD_OFF. This will enable the PLL configuration code however please note you should not use GEL files while using MCU_NO_PLL option. This feature is developed for using the MCU driver code in the SBL bootloader development where GEL files should not be present.

Thanks,
G Kowshik

Hi Aswathy, 

The PLL clocks configured in the Mcu_Platform.c are not open for configuration to the user. If you want to modify the clock that goes to a particular peripheral (for example, you want to configure the RTI timer peripheal's frequency to be 100Mhz instead of 200MHz), then it can be configured through the Mcu Module or through the below structure in the examples 

Thanks

Hi Aswathy,

yes the values you quoted are correctly configured. Infact these are the same values which the GEL file also configures too, you can cross verify these values from the GEL functions too. However, to be simple your observations are correct.

Thanks

Hi Aswathy,

MCAL doesn't allow you to reduce the clock values of the Core directly as this involves direct handling of master PLLs if configured wrongly could brick the SoC. The way to change the master PLL's output values is to configure the M2N, MN2, FracM etc., attributes which are hardcoded as of now for 400Mhz frequency. You can try tweaking the HSDIV_CLKOUT2 value to divide the core frequency. 

Thanks