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TMS570LC4357: EMIF Timing parameters for interfacing MT28EW NOR Flash

Part Number: TMS570LC4357


I'm wanting to interface a MT28EW Nor Flash chip from Micron in 16-bit mode with ASYNC1 with EMIF_CLK 75MHz

I have used the default ASYCN1 timing parameters (as well as some others to no avail). I have configured R5-MPU Region5 to be DEVICE_NONSHARABLE, PRIV_RW_USER_RW_EXEC size 128_MB.

Question #1 Is enabling MPU a requirement for EMIF to work properly? Could I disable it?

Question #2 How can I derive the timing values from the MT28EW datasheet?

Below is my test code to reset the device, query CFI identification string, write to base_addr offset 0 then read back the value.

_mpuInit_();
_mpuEnable_();

emif_ASYNC1Init();

uint16_t read_back = 0x1234;

volatile uint16_t *base_addr = (volatile uint16_t *)0x60000000;
*((volatile uint16_t *)base_addr + 0x555) = 0xAA;
*((volatile uint16_t *)base_addr + 0x2AA) = 0x55;
*((volatile uint16_t *)base_addr) = 0xF0;

*((volatile uint16_t *)base_addr + 0x555) = 0x98;
read_back = *((volatile uint16_t *)base_addr + 0x010);

*((volatile uint16_t *)base_addr + 0x555) = 0xAA;
*((volatile uint16_t *)base_addr + 0x2AA) = 0x55;
*((volatile uint16_t *)base_addr + 0x555) = 0xA0;
*((volatile uint16_t *)base_addr) = 0xBEEF;

read_back = *((volatile uint16_t *)base_addr);

The above test assigns 0xFFFF to read_back in both situations. I should expect 0x0051 and 0xBEEF respectively.

I have examined our custom hardware schematic and don't see any issues. EMIF_BA1 is connected to A0. EMIF_WAIT is not muxed. BYTE# is pulled HIGH via 1K R. RFU[1:3] are NC. CE# is EMIF_CS2.

Question #3 Am I missing any other fundamental configurations to get EMIf to work?

mt28ew01gaba1hpc0sittr-datasheets-1728.pdf