LAUNCHXL2-RM57L: Setting precise bit timing for DCAN

Joe Cassara

I'm unclear how to configure precise bit timings for CAN on the RM57L. The values highlighted in the table below are what I'm trying to achieve:

Available clock rates for VCLKA1 are: 15mhz, 70.313mhz, 10mhz, and 281.25mhz.

over 2 years ago

0 QJ Wang over 2 years ago

TI__Guru**** 200126 points

Do you mean how to program those highlighted parameters to CAN module registers?

0 QJ Wang over 2 years ago in reply to QJ Wang

TI__Guru**** 200126 points

For high-lighted settings, the CAN_CLK or VCLKA1 should be 8*integer MHz, for example 8MHz, 16MHz, 24MHz, ...104MHz (maximum = 110MHz).

0 Joe Cassara over 2 years ago in reply to QJ Wang

Prodigy 110 points

Does this require that we generate a base 8mhz clock source to feed to VCLKA1? Can a PLL be adjusted or do we require an external source? My concern is that adjusting a PLL may interfere with the functionality of other modules that rely on it.

0 QJ Wang over 2 years ago in reply to Joe Cassara

TI__Guru**** 200126 points

What is your PLL frequency? and OSC clock input frequency? You can set OSC as VLCKA1 source.

0 Joe Cassara over 2 years ago in reply to QJ Wang

Prodigy 110 points

PLL is 281.25mhz and OSC is 15mhz.

0 QJ Wang over 2 years ago in reply to Joe Cassara

TI__Guru**** 200126 points

Is PLL=281.25 a special requirement for your application? RM57Lx can operate up to 330mHz

You can get VCLKA1=104 if PLL=312:

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LAUNCHXL2-RM57L: Setting precise bit timing for DCAN