While going through the Arm developer site on Cortex R5, I came across this page: https://developer.arm.com/Processors/Cortex-R5
Arm says that Cortex-R5 can be configured to work as dual cores running independently, each executing its own program with its own bus interfaces. Can you explain more about this configuration? How can we ensure that this processor will always run as lockstep and not dual cores?
