TMDSCNCD263: SPI Data width configuration

Hi Rubina,

I have assigned this to our SPI expert.

Thanks

Hi Rubina,

Can you share your SPI configuration? Spi_Cfg.c, Spi_PBcfg.c

Thanks And Regards,

Sunil Kumar M S

Hi Sunil,

Please find the files

/*
*
* Copyright (c) 2022 Texas Instruments Incorporated
*
* All rights reserved not granted herein.
*
* Limited License.
*
* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
* license under copyrights and patents it now or hereafter owns or controls to make,
* have made, use, import, offer to sell and sell ("Utilize") this software subject to the
* terms herein.  With respect to the foregoing patent license, such license is granted
* solely to the extent that any such patent is necessary to Utilize the software alone.
* The patent license shall not apply to any combinations which include this software,
* other than combinations with devices manufactured by or for TI ("TI Devices").
* No hardware patent is licensed hereunder.
*
* Redistributions must preserve existing copyright notices and reproduce this license
* (including the above copyright notice and the disclaimer and (if applicable) source
* code license limitations below) in the documentation and/or other materials provided
* with the distribution
*
* Redistribution and use in binary form, without modification, are permitted provided
* that the following conditions are met:
*
* *       No reverse engineering, decompilation, or disassembly of this software is
* permitted with respect to any software provided in binary form.
*
* *       any redistribution and use are licensed by TI for use only with TI Devices.
*
* *       Nothing shall obligate TI to provide you with source code for the software
* licensed and provided to you in object code.
*
* If software source code is provided to you, modification and redistribution of the
* source code are permitted provided that the following conditions are met:
*
* *       any redistribution and use of the source code, including any resulting derivative
* works, are licensed by TI for use only with TI Devices.
*
* *       any redistribution and use of any object code compiled from the source code
* and any resulting derivative works, are licensed by TI for use only with TI Devices.
*
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
*
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* DISCLAIMER.
*
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

/**
 *  \file     Spi_Cfg.h
 *
 *  \brief    This file contains generated pre compile configuration file
 *            for SPI MCAL driver
 */

  /*****************************************************************************
    Project: Lecu
    Date   : 2023-06-06 10:38:03
    This file is generated by EB Tresos
    Do not modify this file, otherwise the software may behave in unexpected way.
 ******************************************************************************/

/**
 *  \defgroup MCAL_SPI_CFG SPI Configuration
 *
 *  This files defines SPI MCAL configuration structures
 *  @{
 */

#ifndef SPI_CFG_H_
#define SPI_CFG_H_

/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
#include "Os.h"
#include "Dem.h"
#include "Det.h"
#include "Spi_Cbk.h"

#ifdef __cplusplus
extern "C" {
#endif

/**
*  \brief SPI Build Variant.
*   Build variants.(i.e Pre Compile,Post Build or Link time)
*/

#define SPI_PRE_COMPILE_VARIANT       (STD_OFF)

#define SPI_VARIANT_POST_BUILD        (STD_ON)

#define SPI_LINK_TIME_VARIANT         (STD_OFF)

/** \brief SPI Config ID */
#define SPI_CFG_ID          (0x1U)

/**
 *  \brief Pre Compile config macro name.
 */


/** \brief Buffer mode - Internal or External or Both */
#define SPI_CHANNELBUFFERS          (SPI_IB_EB)

/** \brief Internal Buffer length in bytes - applicable only for SPI_IB */
#define SPI_IB_MAX_LENGTH           (64U)

/** \brief Enable/disable SPI dev detect error */
#define SPI_DEV_ERROR_DETECT        (STD_ON)

/** \brief Enable/disable SPI job log */
#define SPI_JOB_LOG                 (STD_OFF)

/** \brief Maximum job log entries when logging is ON */
#define SPI_MAX_JOB_LOG             (100U)

/*
 * Scalability levels
 */
/** \brief Basic Synchronous functions */
#define SPI_LEVEL_0                     (0U)
/** \brief Basic Asynchronous functions */
#define SPI_LEVEL_1                     (1U)
/** \brief Synchronous and Asynchronous functions */
#define SPI_LEVEL_2                     (2U)

/** \brief Concurrent sync transmit support - by defualt this is off */
#define SPI_SUPPORT_CONCURRENT_SYNC_TRANSMIT    (STD_OFF)

/** \brief Scalability level */
#define SPI_SCALEABILITY            (SPI_LEVEL_2)

/** \brief Enable/disable SPI get version info API */
#define SPI_VERSION_INFO_API        (STD_ON)

/** \brief Enable/disable SPI HW Status API */
#define SPI_HW_STATUS_API           (STD_ON)

/** \brief Enable/disable SPI cancel API */
#define SPI_CANCEL_API              (STD_ON)

/*
 * All below macros are used for static memory allocation and can be changed to
 * match the usecase requirements.
 */
/** \brief Maximum channels allowed per job */
#define SPI_MAX_CHANNELS_PER_JOB    (2U)

/** \brief Maximum jobs allowed per sequence */
#define SPI_MAX_JOBS_PER_SEQ        (2U)

/** \brief Maximum channels across all jobs/sequence/hwunit */
#define SPI_MAX_CHANNELS            (2U)

/** \brief Maximum jobs across all sequence/hwunit */
#define SPI_MAX_JOBS                (2U)

/** \brief Maximum sequence across all hwunit */
#define SPI_MAX_SEQ                 (2U)

/**
 *  \brief Maximum HW unit - This should match the sum for the below units ISR
 *  which are ON.
 */
#define SPI_MAX_HW_UNIT             (2U)

/**
 *  \brief Maximum external device cfg
 */
#define SPI_MAX_EXT_DEV             (2U)





/*
 All below macros are used for enabling the ISR for a particular hardware.
 */


/** \brief Enable/disable SPI MCSPI0 unit ISR */

#define SPI_UNIT_MCSPI0_ACTIVE      (STD_ON)

/** \brief Enable/disable SPI MCSPI1 unit ISR */

#define SPI_UNIT_MCSPI1_ACTIVE      (STD_ON)

/** \brief Enable/disable SPI MCSPI2 unit ISR */

#define SPI_UNIT_MCSPI2_ACTIVE      (STD_OFF)

/** \brief Enable/disable SPI MCSPI3 unit ISR */

#define SPI_UNIT_MCSPI3_ACTIVE      (STD_OFF)


/** \brief Enable/disable SPI MCSPI4 unit ISR */

#define SPI_UNIT_MCSPI4_ACTIVE      (STD_OFF)







/** \brief ISR type */
#define SPI_ISR_TYPE                (SPI_ISR_CAT2)

/** \brief OS counter ID - used for timeout in case of error */
#define SPI_OS_COUNTER_ID           ((CounterType)0U)

/**
 *  \brief SPI timeout - used in McSPI IP reset
 *   Each tick is 31.25us (for 32K Counter). Wait for 100ms which comes to
 *   below value
 */
#define SPI_TIMEOUT_DURATION        (32000U)

/** \brief Enable/disable SPI register read back API */
#define SPI_REGISTER_READBACK_API   (STD_ON)

/** \brief Enable/disable SPI safety API */
#define SPI_SAFETY_API   (STD_ON)

/** \brief Symbolic Name Channel Id  - 0 SpiChannel_0 */
#define SpiConf_SpiChannel_SpiChannel_0   0
/** \brief Symbolic Name Channel Id  - 1 SpiChannel_1 */
#define SpiConf_SpiChannel_SpiChannel_1   1

/** \brief Symbolic Name Chip Select  - 0 */
#define SpiConf_SpiExternalDevice_CS0 (SPI_CS0)


/** \brief Symbolic Name Job Id - 0 SpiJob_0 */
#define SpiConf_SpiJob_SpiJob_0            0


/** \brief Symbolic Name Chip Select  - 1 */
#define SpiConf_SpiExternalDevice_CS1 (SPI_CS0)


/** \brief Symbolic Name Job Id - 1 SpiJob_1 */
#define SpiConf_SpiJob_SpiJob_1            1

/** \brief Symbolic Name Sequence Id - 0 SpiSequence_0 */
#define SpiConf_SpiSequence_SpiSequence_0  0
/** \brief Symbolic Name Sequence Id - 1 SpiSequence_1 */
#define SpiConf_SpiSequence_SpiSequence_1  1


#define SpiConf_SpiExternalDevice_SpiExternalDevice_0_CS0 SCS0
#define SpiConf_SpiExternalDevice_SpiExternalDevice_1_CS0 SCS0
/** \brief Symbolic Name HW Unit - 0 */
#define SpiConf_SpiExternalDevice_SpiExternalDevice_0_HwUnitId0 CSIB0
/** \brief Symbolic Name HW Unit - 0 */
#define SpiConf_SpiExternalDevice_SpiExternalDevice_1_HwUnitId1 CSIB0


/**
 *  \name SPI DEM Error codes to report
 *
 *  Pre-compile switches for enabling/disabling DEM events
 *  @{
 */
#define DemConf_DemEventParameter_SPI_DEM_NO_EVENT (0xFFFFU)
#define SPI_DEM_NO_EVENT DemConf_DemEventParameter_SPI_DEM_NO_EVENT

#ifndef SPI_E_HARDWARE_ERROR
/** \brief Hardware failed */
#define SPI_E_HARDWARE_ERROR        (DemConf_DemEventParameter_SPI_E_HARDWARE_ERROR)
#endif
/**
 *  \name SPI HW unit Info
 *  @{
 */

/** \brief MCSPI0 instance */
#define SPI_UNIT_MCSPI0                     ((Spi_HWUnitType) CSIB0)
/** \brief MCSPI1 instance */
#define SPI_UNIT_MCSPI1                     ((Spi_HWUnitType) CSIB1)
/** \brief MCSPI2 instance */
#define SPI_UNIT_MCSPI2                     ((Spi_HWUnitType) CSIB2)
/** \brief MCSPI3 instance */
#define SPI_UNIT_MCSPI3                     ((Spi_HWUnitType) CSIB3)
/** \brief MCSPI4 instance */
#define SPI_UNIT_MCSPI4                     ((Spi_HWUnitType) CSIB4)


/**
 *  \brief Total HW units - used for array allocation. This should be +1 of the
 *  max unit number
 */
#define SPI_HW_UNIT_CNT                 (5U)

extern const uint32 Spi_HwUnitBaseAddr[SPI_HW_UNIT_CNT];

/* @} */

/* ========================================================================== */
/*                         Structures and Enums                               */
/* ========================================================================== */


/** \brief SPI Configuration struct declaration */
extern const struct Spi_ConfigType_s SpiDriver;


/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */
/**
 *  \brief SPI Hwunit ISR
 */

/*Function prototypes-ISR() are declared by OS for SPI_ISR_CAT2 */

#ifdef __cplusplus
}
#endif

#endif  /* #ifndef SPI_CFG_H_ */

/* @} */

/*
*
* Copyright (c) 2022 Texas Instruments Incorporated
*
* All rights reserved not granted herein.
*
* Limited License.
*
* Texas Instruments Incorporated grants a world-wide, royalty-free, non-exclusive
* license under copyrights and patents it now or hereafter owns or controls to make,
* have made, use, import, offer to sell and sell ("Utilize") this software subject to the
* terms herein.  With respect to the foregoing patent license, such license is granted
* solely to the extent that any such patent is necessary to Utilize the software alone.
* The patent license shall not apply to any combinations which include this software,
* other than combinations with devices manufactured by or for TI ("TI Devices").
* No hardware patent is licensed hereunder.
*
* Redistributions must preserve existing copyright notices and reproduce this license
* (including the above copyright notice and the disclaimer and (if applicable) source
* code license limitations below) in the documentation and/or other materials provided
* with the distribution
*
* Redistribution and use in binary form, without modification, are permitted provided
* that the following conditions are met:
*
* *       No reverse engineering, decompilation, or disassembly of this software is
* permitted with respect to any software provided in binary form.
*
* *       any redistribution and use are licensed by TI for use only with TI Devices.
*
* *       Nothing shall obligate TI to provide you with source code for the software
* licensed and provided to you in object code.
*
* If software source code is provided to you, modification and redistribution of the
* source code are permitted provided that the following conditions are met:
*
* *       any redistribution and use of the source code, including any resulting derivative
* works, are licensed by TI for use only with TI Devices.
*
* *       any redistribution and use of any object code compiled from the source code
* and any resulting derivative works, are licensed by TI for use only with TI Devices.
*
* Neither the name of Texas Instruments Incorporated nor the names of its suppliers
*
* may be used to endorse or promote products derived from this software without
* specific prior written permission.
*
* DISCLAIMER.
*
* THIS SOFTWARE IS PROVIDED BY TI AND TI'S LICENSORS "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL TI AND TI'S LICENSORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/

/**
 *  \file     Spi_PBcfg.c
 *
 *  \brief    This file contains generated post build configuration file
 *            for SPI MCAL driver
 */

  /*****************************************************************************
    Project: Lecu
    Date   : 2023-06-06 10:38:03
    This file is generated by EB Tresos
    Do not modify this file, otherwise the software may behave in unexpected way
 ******************************************************************************/
/*******************************************************************************
 *  INCLUDES
 ******************************************************************************/
#include "Spi.h"
#include "Spi_Irq.h"


/*******************************************************************************
 *  VERSION CHECK
 ******************************************************************************/
#if ((SPI_SW_MAJOR_VERSION != (8U)) || (SPI_SW_MINOR_VERSION != (6U)))
  #error "Version numbers of Spi_PBcfg.c and Spi.h are inconsistent!"
#endif
/*******************************************************************************
 *  LOCAL CONSTANT MACROS
 ******************************************************************************/

/*******************************************************************************
 *  LOCAL FUNCTION MACROS
 ******************************************************************************/

/*******************************************************************************
 *  LOCAL DATA TYPES AND STRUCTURES
 ******************************************************************************/

/*******************************************************************************
 *  LOCAL DATA PROTOTYPES
 ******************************************************************************/

/*******************************************************************************
 *  GLOBAL DATA
 ******************************************************************************/
#define  SPI_START_SEC_CONFIG_DATA
#include "Spi_MemMap.h"
/* generation of runtime configuration       */

#ifdef __cplusplus
extern "C" {
#endif



extern void SpiApp_McspiJob0EndNotification(void);
extern void SpiApp_McspiJob1EndNotification(void);

extern void SpiApp_McspiSeq0EndNotification(void);
extern void SpiApp_McspiSeq1EndNotification(void);

CONST(struct Spi_ConfigType_s, SPI_CONFIG_DATA) SpiDriver =
{
    .maxChannels = 2U,
    .maxJobs = 2U,
    .maxSeq  = 2U,
    .maxHwUnit = 2U,
    .maxExtDevCfg = 2U,
    .channelCfg =
    {
            [0] =
            {
                .channelBufType = SPI_EB,
                .dataWidth = 8U,
                .defaultTxData = 0U,
                .maxBufLength = 100U,
                .transferType = SPI_MSB,
            },
            [1] =
            {
                .channelBufType = SPI_EB,
                .dataWidth = 8U,
                .defaultTxData = 0U,
                .maxBufLength = 100U,
                .transferType = SPI_MSB,
            },
        },
    .jobCfg =
    {
            [0] =
            {
                .jobPriority = SPI_JOB_PRIORITY_0,
                .hwUnitId = SPI_UNIT_MCSPI0,
                .Spi_JobEndNotification = SpiApp_McspiJob0EndNotification,
                .channelPerJob = 1U,
                .channelList =
                {
                    [0] = 0U,
                },
            },
            [1] =
            {
                .jobPriority = SPI_JOB_PRIORITY_1,
                .hwUnitId = SPI_UNIT_MCSPI1,
                .Spi_JobEndNotification = SpiApp_McspiJob1EndNotification,
                .channelPerJob = 1U,
                .channelList =
                {
                    [1] = 1U,
                },
            },
        },
    .seqCfg =
    {
            [0] =
            {
                .seqInterruptible = (uint8) TRUE,
                .Spi_SequenceEndNotification = SpiApp_McspiSeq0EndNotification,
                .jobPerSeq = 1U,
                .jobList =
                {
                    0U,
                },
            },
            [1] =
            {
                .seqInterruptible = (uint8) TRUE,
                .Spi_SequenceEndNotification = SpiApp_McspiSeq1EndNotification,
                .jobPerSeq = 1U,
                .jobList =
                {
                    1U,
                },
            },
        },
    .hwUnitCfg =
    {
            [0] =
            {
                .hwUnitId = SPI_UNIT_MCSPI0,
            },
            [1] =
            {
                .hwUnitId = SPI_UNIT_MCSPI1,
            },
        },
    .extDevCfg =
    {
            [0] =
            {
        .mcspi =
                {
                    .csEnable = (uint16) TRUE,
                    .csMode   = SPI_CONTINUOUS,
                    .csPolarity = SPI_HIGH,
                    .csIdleTime = SPI_DATADELAY_0,
                    .clkDivider = 99U,
                    .clkMode = SPI_CLK_MODE_0,
                    .txRxMode     = SPI_TX_RX_MODE_BOTH,
                    .startBitEnable =  (uint16) FALSE,
                    .startBitLevel  = SPI_LOW,
                    .receptionLineEnable  = DATA_LINE_0_RECEPTION,
                    .transmissionLineEnable  = DATA_LINE_0_TRANSMISSION,
                },
            },
            [1] =
            {
        .mcspi =
                {
                    .csEnable = (uint16) TRUE,
                    .csMode   = SPI_CONTINUOUS,
                    .csPolarity = SPI_HIGH,
                    .csIdleTime = SPI_DATADELAY_0,
                    .clkDivider = 49U,
                    .clkMode = SPI_CLK_MODE_1,
                    .txRxMode     = SPI_TX_RX_MODE_BOTH,
                    .startBitEnable =  (uint16) TRUE,
                    .startBitLevel  = SPI_LOW,
                    .receptionLineEnable  = DATA_LINE_0_RECEPTION,
                    .transmissionLineEnable  = DATA_LINE_1_TRANSMISSION,
                },
            },
        },
};



CONST(Spi_ChannelConfigType_PC, SPI_CONFIG_DATA) Spi_ChannelConfig_PC[] =
{
    [0] =
        {
            .channelId = SpiConf_SpiChannel_SpiChannel_0,
        },
    [1] =
        {
            .channelId = SpiConf_SpiChannel_SpiChannel_1,
        },
};

CONST(Spi_JobConfigType_PC, SPI_CONFIG_DATA) Spi_JobConfig_PC[] =
{
    [0] =
        {
            .jobId = SpiConf_SpiJob_SpiJob_0,
            .csPin = SpiConf_SpiExternalDevice_CS0,
            .externalDeviceCfgId = (uint8)0,
        },
    [1] =
        {
            .jobId = SpiConf_SpiJob_SpiJob_1,
            .csPin = SpiConf_SpiExternalDevice_CS1,
            .externalDeviceCfgId = (uint8)1,
        },
};

CONST(Spi_SeqConfigType_PC, SPI_CONFIG_DATA) Spi_SeqConfig_PC[] =
{
    [0] =
        {
            .seqId = SpiConf_SpiSequence_SpiSequence_0,
        },
    [1] =
        {
            .seqId = SpiConf_SpiSequence_SpiSequence_1,
        },
};



/**
 *  \brief This type defines a range of HW SPI Hardware microcontroller
 *         peripheral allocated to this Job
 */
const uint32 Spi_HwUnitBaseAddr[SPI_HW_UNIT_CNT] =
{
 
 
   0x52200000 ,      	            /* MCSPI0 */
   0x52201000 ,      	    /* MCSPI1 */
   0x52202000 ,      	    /* MCSPI2 */
   0x52203000 ,      	    /* MCSPI3 */
   0x52204000      	    /* MCSPI4 */
};

#ifdef __cplusplus
}
#endif

#define  SPI_STOP_SEC_CONFIG_DATA
#include "Spi_MemMap.h"

#define  SPI_START_SEC_ISR_CODE
#include "Spi_MemMap.h"
/**
 *  \brief SPI Hwunit ISR
 */


ISR(Spi_IrqUnitMcspi0TxRx)
{
    Spi_IntISR_McspiTxRx(SPI_UNIT_MCSPI0);
}

ISR(Spi_IrqUnitMcspi1TxRx)
{
    Spi_IntISR_McspiTxRx(SPI_UNIT_MCSPI1);
}

#define  SPI_STOP_SEC_ISR_CODE
#include "Spi_MemMap.h"
/*******************************************************************************
 *  END OF FILE: Spi_PBcfg.c
 ******************************************************************************/

Thanks and Regards,

Rubina 

Hi Rubina,

Can you clarify on below questions?

1. In the configuration attached, SPI0 instance configured in loopback mode and SPI1 instance not configured in loopback mode. Is this expected?
2. In the snaps you attached, can you explain what is 0xFF, 0x12, 0x1FF?? Sorry I did understand clearly.

Thanks And Regards,

Sunil Kumar M S

Hi Sunil,

1. There is no expectation for configuration. From where I have configured SPI1 in loopback mode

2. In this snapshot 

12 was a MOSI data.

FF and 1FF was a data from MISO.

Hi Rubina,

Can you explain your test set up here?

Are SPI0 and SPI1 are connected to any slave devices?

I see you configured SPI0 in loopback mode and SPI1 not.

Also you have configured SPI1_CS1, is CS1 is connected to slave?

Thanks And Regards,

Sunil Kumar M S

Hi Sunil,

As of now, no slave device is connected. Am just verifying the SPI tx alone. 

Thanks and Regards,

Rubina Josphine B

Hi Rubina,

Can you please share both MOSI and MISO waveforms of SPI0 and SPI1? Please don't enable Logic analyzer to analyze SPI data? I want to check without that.  

Thanks And Regards,

Sunil Kumar M S

Hi Rubina,

Any updates here?

Thanks And Regards,

Sunil Kumar M S

Hi Sunil,

Please find the SPI 1 waveforms for MISO and  MOSI

Please find the waveforms of SPI 0 MISO and MOSI

Hi Rubina,

Thank you for sharing the waveforms. If I review SPI1 configuration, you have enabled start bit. So start bit will be added before the MSB to indicate
whether the next MCSPI word must be handled as a command or as data. Please refer section "MCSPI Protocol and Data Format" in TRM for more details.

Thanks And Regards,

Sunil Kumar M S

Hi Sunil,

Thank you. Let me check in the configuration and update it 

Thanks and Regards,

Rubina Josphine B