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TMDSCNCD263: AM263x EPWMCLK value?

Part Number: TMDSCNCD263

What is EPWMCLK for the AM263x?  Other hardware has it as SYSCLK or SYSCLK/2 according to the forum.  But the TRM, Hardware Design Guide, and the AM263x datasheet are all silent on it.

  • Hello Daniel,

    All peripherals of the AM263x Real-Time Control Subsystem (CONTROLSS) including EPWM operate from a shared 200 MHz source clock. The root clock information and frequency tables are provided in the Device Configuration-Clocking chapter of the TRM. I will fill a ticket to have a clarifying note added to the content to address this.

    Best Regards,

    Zackary Fleenor

  • Thank you.  The TRM gives examples with several different clock values, none of which are 200MHz, and no explanation why.  In the datasheet section 7.6 there's a table of clock frequencies.  Is the INFRA the clock that feeds ePWM and other peripherals?  In other words, changing to a grade P part will not affect the ePWM timing?

  • Welcome! The devices at the time this original content was written only supported clocks under 100 MHz, the AM263x device family utilizes 45nm technology that can support faster clock speeds throughout the SoC. The INFRA clock actually refers to the operating speed of the device interconnects and bus fabric. I will file a ticket to have a CONTROLSS column added to the OPP table. All three rows will be 200 MHz, as you inferred, changing to grade P part does not effect clocking/timing of CONTROLSS peripherals such as ePWM.

    Best Regards,

    Zackary Fleenor