AM2634-Q1: ESM queries

Hi All,

Anyone who has who has expertise on ESM please do respond to me to help me understand the ESM better. I would need to consider the feedback to plan the usage of this feature.

Hello Ashish,

I apologize for the delay, please allow me until Monday to find all of the answers to your questions. 

Ashish Sebastian said:

Does it mean that these are pre-defined (system specific events)? If so, are the 86 events, the consolidated list or further combinations are also possible?

The ESM supports up to 1024 error events but the way that it was implemented on the AM263x only 86 error events were routed to the module. These 86 interrupts can be found in chapter 10.4.6 ESM0 Interrupt Map. The interrupt ID refers to the error event group and respective bit, I.E. if you hypothetically only have one error event in group 1 and it is voltage_monitor_err_H, then the Group 1 ESM raw status register would show 0x00000200 since voltage_monitor_err_H is bit 9 of group 1 (interrupt 41 - 32 = 9). 

Ashish Sebastian said:

Are user-defined error events also possible to be configured?

Only the error events listed in chapter 10.4.6 are supported. 

Ashish Sebastian said:

How are the Err events from the peripherals routed to the ESM? Is it based on updation of certain registers? If you have some block diagram representation of this flow it would have been helpful to understand.

The error events are routed internally to the ESM. If a module in the TRM has an interrupt that is routed to the ESM then the module will have a Module interrupt signal with the destination as ESM in the <module> interrupt requests chapter.

For example, Table 4-58. MCAN Interrupt Requests shows the module interrupt signal: MCAN0_ECC_COR R_LVL_INT_0 with the interrupt destination of the ESM at ESM0_LVL_IN_2. Chapter 10.4.6 shows ESM_LVL_EVENT_2 as MCAN0_ecc_corr_lvl_int represented as Interrupt ID# 2. Therefore, MCAN0_ECC_CORR_LVL_INT_0 is bit 2 of group 0. 

Ashish Sebastian said:

On what basis are we categorizing the err events as high or low prio? Is it predefined or needs to be defined by the user based on the project use-cases?

This is defined by INT_PRIO register. All interrupts are low priority by default and when the respective group's bit is high then that interrupt is now defined as high priority. 

Ashish Sebastian said:

Are the err events already pre-grouped or would it need to be done based on customer use-cases?

The error events are as shown in chapter 10.4.6 where they are grouped by interrupt number into groups of 32. 

Ashish Sebastian said:

Would it be possible to trigger the nError pin manually using 'SDL_ESM_setNError' API by running user-defined logic; based on the callbacks received from the ESM groups?

I will have to reach out internally to find the answer to this question. 

Ashish Sebastian said:

Is it possible to have a consolidated list of err events already supported with the details of scenario with the err event would be triggered

Yes, this list is given in Chapter 10.4.6 and the details of each interrupt event can be found in the respective module section. 

Regards,

Erik

Hello Erik,

Thanks a lot for getting back to me.

I did go through the references and it does seem to make sense.

Once you have answers for thee other queries as well; do you think we can have a short alignment over either teams/webex call to discuss certain scenarios related to the project use-case to see how they can be supported. Also, I would like to double check my understandings with you during that call.  

Would this be possible please? Is so, it would have been very helpful. email : ashish.sebastian@empelsystems.com

Hello Erik,

Any feedbacks on the topic please?

Hello Ashish,

I apologize for the delay, I am still waiting on some internal discussion for the answers to your other questions. 

Would it be possible to detail the project use-cases on this thread? 

Regards,

Erik

Hi Erik,

I was told that the project use cases should not be shared in the common forum. However, If I can get your mail id; I could send them to you or I will have to route it through Sean Murphy; who is our 1st level of contact.

Hello Ashish,

Ashish Sebastian said:

Are ESM interrupts routed to VIM module through XBAR interface?

The ESM does not require any XBAR configuration.

Ashish Sebastian said:

Would it be possible to trigger the nError pin manually using 'SDL_ESM_setNError' API by running user-defined logic; based on the callbacks received from the ESM groups?

You can configure the error influence on the nError pin by configuring the values in the variable errorpinBitmap in the structure ECC_Test_esmInitConfig_MAIN.

Please look in to the mcu_plus_sdk_am263x_08_06_00_34\examples\sdl\ecc\sdl_ecc_mcan\ecc_trigger.c.

The same can also be done by calling SDL_ESM_setNError.

I will be away from the office for the rest of the week and so I will be reassigning this thread. If you still have questions or concerns next week then I will be happy to address them. I sent you a friend request so that you can direct message me regarding specific use cases in a non-public forum.

Regards,

Erik