TMS570LC4357: EMIF address access problem

Josh Blohm

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN

I am working with an external ASYNC NOR Flash (MT28EW 1Gb) using EMIF ASYNC1. I have a test script which tries to write a pattern to every address and read it back for comparison. I can successfully write to and read from all addresses within the allotted 22 bit address space. I want to access higher regions of memory using GIO to assert the remaining address lines. I see strange behavior when reading from the higher address space. I continue writing to all addresses but any address > 0x7FFFFF where A1 (EMIF_ADDR0) should be high reads back 0xFFFF (unwritten) and fails the comparison. All other addresses in this upper region read back correctly.

The Micron device driver for this part yields no failures when writing to these problem addresses though I don't exactly trust this. Here is our schematic for the flash device. I am unable to scope the bus.

My logic for reading and writing is as follows:

#define MASK_ADDR(addr) (addr & 0x7FFFFF)

#define check_a23(addr) (addr & (1 << 23))

#define check_a24(addr) (addr & (1 << 24))

#define check_a25(addr) (addr & (1 << 25))

uint16_t FlashRead_AddrSpace( uint32_t udAddrOff )

{

if( check_a23(udAddrOff) )

SET_EMIF_ADDR(EMIF_A23);

if( check_a24(udAddrOff) )

SET_EMIF_ADDR(EMIF_A24);

if( check_a25(udAddrOff) )

SET_EMIF_ADDR(EMIF_A25);

uint16_t ucVal = BASE_ADDR[MASK_ADDR(udAddrOff)];

CLEAR_EMIF_ADDR(EMIF_A23);

CLEAR_EMIF_ADDR(EMIF_A24);

CLEAR_EMIF_ADDR(EMIF_A25);

return ucVal;

} /* EndFunction FlashRead */

void FlashWrite_AddrSpace( uint32_t udAddrOff, uint16_t ucVal )

{

if( check_a23(udAddrOff) )

SET_EMIF_ADDR(EMIF_A23);

if( check_a24(udAddrOff) )

SET_EMIF_ADDR(EMIF_A24);

if( check_a25(udAddrOff) )

SET_EMIF_ADDR(EMIF_A25);

/* Write ucVal to the word offset in flash */

BASE_ADDR[MASK_ADDR(udAddrOff)] = ucVal;

CLEAR_EMIF_ADDR(EMIF_A23);

CLEAR_EMIF_ADDR(EMIF_A24);

CLEAR_EMIF_ADDR(EMIF_A25);

}

Am I correct in my logic for using GIO for the extra address pins? Masking the address to clear bits [31-23] and setting them manually with GIO instead should behave the same as reading from the lower addresses right? I don't understand the behavior of A1 in this context.

over 2 years ago

0 QJ Wang over 2 years ago

TI__Guru**** 196566 points

The TRM says that BA[0] can be used as the upper address (A[22]). This is not correct. This device is designed for functional safety application, only 16MB (A[21:0]) is implemented for each CSx. Accessing the memory location beyond this range will generate abort.

So A GPIO or BA[0] can not be used as A[22].

0 Josh Blohm over 2 years ago in reply to QJ Wang

Prodigy 70 points

QJ,

My initial question is specifically regarding this section of the TRM: 21.2.6.2. From my attached schematic my signals EMIF_MSB_A23, EMIF_MSB_A24, and EMIF_MSB_A25 are mapped to GIOA[4:6]. I have unchecked the pinmux for BA[0] in HALCoGen.

My macros for SET_EMIF_ADDR and CLEAR_EMIF_ADDR manually toggle the GIO pins accordingly. Those pins are set before the access and cleared after. I intend to avoid the abort by masking the address before accessing the memory location. This method yields success for any address larger than the 16MB space except for those with EMIF_ADDR0 = 1. Attached is an XLSX where I printed the addresses for which write-to and read-back failed for the first 512 accesses.

(Question 1) Am I correct in my initial assumption that, for my application, BA[1] acts as A0 and EMIF_ADDR21 acts as A22? and that (Question 2) memory location 0x00800000 is the first address for which I should apply this method of using GIO to expand the reach.

I have referenced this thread though I'm aware that it pertains to the TMS570LS

TMS570LS3137: EMIF: Using GPIO for increasing the address lines to access large memories - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums

A1 Issue.xlsx

0 QJ Wang over 2 years ago in reply to Josh Blohm

TI__Guru**** 196566 points

Josh Blohm said:
(Question 1) Am I correct in my initial assumption that, for my application, BA[1] acts as A0 and EMIF_ADDR21 acts as A22?

Yes, it is correct.

Josh Blohm said:
(Question 2) memory location 0x00800000 is the first address for which I should apply this method of using GIO to expand the reach.

the first memory location is 0x60000000 for CS2.

the address should be 0x6100_0006

0 Josh Blohm over 2 years ago in reply to QJ Wang

Prodigy 70 points

Thanks for your response. To make sure I understand the address selection of 0x6100_0006. Why the additional offset of 0x6?

0 QJ Wang over 2 years ago in reply to Josh Blohm

TI__Guru**** 196566 points

Your memory is 16-bit wide, so the EMIF_BA[1] or Memory_A[0] is half-word (16-bit) address.

Physical address pins: ... EMIF_A[1] EMIF_A[0] EMIF_BA[1]

Logic memory address: b1000 b0100 b0010

0 Josh Blohm over 2 years ago in reply to QJ Wang

Prodigy 70 points

I realized now that I misrepresented my original XLSX file by showing the 16-bit Flash address. This was used in my code as an offset for a uint16_t PTR starting at 0x6000_0000. I have corrected my file and reattached. Reanalyzing the MCU address accesses, I see now that the write-to read-back failures always happen when A2 is set. Why could this be? All other address accesses (16-bit aligned) readback properly. 5621.A1 Issue_v2.xlsx

0 QJ Wang over 2 years ago in reply to Josh Blohm

TI__Guru**** 196566 points

Don't get your question. Why does A2 affect your readback value? The write and read operations use the same address, so the readback data should be = written data.

For NOR flash, CMD should be write/read first, then data. Is the CMD programmed correctly?

0 QJ Wang over 2 years ago in reply to QJ Wang

TI__Guru**** 196566 points

Please refer to my NOR example:

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1213601/tms570lc4357-example-code-for-emif-to-interface-nor-flash?tisearch=e2e-sitesearch&keymatch=NOR%2520AND%2520EMIF#