In the TMS570LC4x Microcontroller Silicon Rev. B Errata document, the recommended workaround for DEVICE#40 is to configure all peripheral frames as "strongly ordered" memory instead of "device" memory. However, "This has a performance penalty when writing to peripheral registers or peripheral memories." I'd like to be able to quantify this performance penalty in order to understand the impact. Is there any data available that could help? Like an average increase in time per write, or something similar?
Thanks,
Cameron
