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AM2632: Is it possible to run FSI with a continous clock?

Robert Finger
Genius 17427 points
Part Number: AM2632

Hi,

The FSI output clock only gets active when data is transmitted. Afterwards its stopped again. Is there any way to configure the FSI peripherals for a continous clock? Or to make sure that with a constant data flow the clock doesn't stop?

This would make it easier to implement FSI on a FPGA counterpart. 

Thanks,
  Robert

  • +1
    TI__Mastermind 23053 points

    Hey Robert,

    The FSI_TX controller can actively transmit the PING frame during down time between DATA frames. The activity of constant PING transmissions will result in consistent output clock and data signals. FSITX contains an embedded PING timer + trigger, and also supports external CONTROLSS-based trigger sources.

    When FSI_TX:TX_PING_CTRL[1].TIMER_EN is set to 1, when the timer count reaches the value set by the TX_PING_TO_REF register, it will initiate a ping frame transmission.

    Note: If the ping timer is used, EXT_TRIG_EN should not be set as it will override the TIMER trigger function.

    However, it is possible control EXT_TRIG_EN by using an FPGA GPIO signal via INPUTXBAR to control. A rising edge on the external trigger will initiate a PING transmission. The external trigger signal should be at least 3 SYSCLK cycles (@ 200 MHz  =  15ns) wide.

    Please refer to the Processors & Accelerators - CONTROLSS - (FSI_TX & Crossbar) chapters of the device TRM and associated register descriptions in the device Register Addendum.

    Best Regards,

    Zackary Fleenor