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TM4C1294KCPDT: About slow register access of General-Purpose Timers

zom
Prodigy 10 points
Part Number: TM4C1294KCPDT


When using General-Purpose Timers as a 16-bit timer (GPTMA), the register access from setting the timer count to enabling the timer count is very slow, and the overhead of timer control increases.
 It takes 1.8μsec for the following 3 steps (system clock is 16.0MHz)

TIMER0_ICR.WORD.UWDATA_LO = (unsigned short)TIMER_ICR_TATOCINT;  // GPTMRIS TimerA T/O Clear
HWREG(TIMER0_BASE + TIMER_O_TAILR) = (unsigned long)timer_count;  // GPTMCC ALTCLK:0(MOSC)
TIMER0_CTL.WORD.UWDATA_LO = (unsigned short)TIMER_CTL_TAEN;   //GPTMCTL TAEN:1

 Could you tell me if there is any reason for this?

  • 0
    TI__Guru**** 191906 points

    Hi,

    zom said:
    It takes 1.8μsec for the following 3 steps (system clock is 16.0MHz)

    Why wouldn't you want to run your application at 120Mhz? At 120Mhz, you would have cut down the time by 7.5X which is equal to 0.24uS. 

    zom said:
    TIMER0_ICR.WORD.UWDATA_LO = (unsigned short)TIMER_ICR_TATOCINT;  // GPTMRIS TimerA T/O Clear
    HWREG(TIMER0_BASE + TIMER_O_TAILR) = (unsigned long)timer_count;  // GPTMCC ALTCLK:0(MOSC)
    TIMER0_CTL.WORD.UWDATA_LO = (unsigned short)TIMER_CTL_TAEN;   //GPTMCTL TAEN:1

    At 16Mhz, each instruction takes 62.5nS. 1.8uS / 62.5ns is about 29 cycles. This means the above three line takes about 29 cycles to execute. Please look at the disassembly and confirm if it is taking this many of cycles. You can also single step the disassembly. 

    I'm not sure what is your compiler optimization level. Can you turn on the optimization to level 2? With higher code optimization, it will improve. Please give it a try. 

  • 0
    Prodigy 10 points

    Thank you for your comment.
    After disassembling it, I found that there are 11 steps of processing. If we simply assume that each step takes an average of 3 states, the 29 cycles indicated is a reasonable approximation.
    Also, since it affects other processes, optimization is currently turned off.
    Since it is difficult to confirm the effect of changing the optimization options, try setting the PLL and increasing the internal processing speed to see if it can be improved.

  • +1
    Prodigy 10 points

    Thank you for your comment.
    After disassembling it, I found that there are 11 steps of processing. If we simply assume that each step takes an average of 3 states, the 29 cycles indicated is a reasonable approximation.
    Also, since it affects other processes, optimization is currently turned off.
    Since it is difficult to confirm the effect of changing the optimization options, try setting the PLL and increasing the internal processing speed to see if it can be improved.